TMS570LS1227: SPI1 MISO Receive Buffer Problem

Rick Henderson1

Part Number: TMS570LS1227
Other Parts Discussed in Thread: HALCOGEN

Hello,

I am using SPI1 to communicate with an external accelerometer. I can successfully send commands to the device via SPI1 and using a logic analyzer I can verify that the correct data is received via the MISO line directly to the MISO pin on the processor. However, whenever I try to read the SPI1 receive register/buffer, it is always all zeros. I am running the device in a polling mode.

I have tried monitoring the RXINT, bit 8, of the SPI FLag Register (SPIFLG) but it is always 0 as well.

The CS, CLK and MOSI all work as expected and as configured. MISO looks correct as well but I'm wondering if I missed a configuration setting or a register read/flag clear operation. I have tried using the spiReceiveData() function generated by HalCoGen but with the same results.

Any help would be greatly appreciated.

Thank you.

over 3 years ago

0 QJ Wang over 3 years ago

TI__Guru**** 186196 points

Hell Rick,

1. Is the device 144-pin PGE package or 337-ball ZWT package?

2. Only MIBSPI1SOMI[0] can be used to receive data in non-parallel mode: Pin 94 for PGE package, and Ball G18 for ZWT package.

3. Make sure that MIBSPI1SOMI[0] is configured as functional pin rather than GIO pin

0 Rick Henderson1 over 3 years ago in reply to QJ Wang

Prodigy 130 points

Hello QJ,

I am using the 144-pin GPC and have MISO from the accelerometer connected to pin 94 of the package. I have included the initialization file that was generated by HalCoGen below. I believe SPI1 is configured correctly but I could be missing something. I am using SPI1 in standard SPI mode and not using the ENA. As mentioned in my previous email, I'm using the polling mode functions from spi.c and the accelerometer is responding correctly but I only receive zeroes in the RXBUF

Thank you for your time and help.

Rick

//*****************************************************************************
//SPI1 Initialization
//*****************************************************************************

/** bring SPI out of reset */
spiREG1->GCR0 = 0U;
spiREG1->GCR0 = 1U;

/** SPI1 master mode and clock configuration */
spiREG1->GCR1 = (spiREG1->GCR1 & 0xFFFFFFFCU) | ((uint32)((uint32)1U << 1U) /* CLOKMOD */
| 1U); /* MASTER */

/** SPI1 enable pin configuration */
spiREG1->INT0 = (spiREG1->INT0 & 0xFEFFFFFFU)| (uint32)((uint32)1U << 24U); /* ENABLE HIGHZ */

/** - Delays */
spiREG1->DELAY = (uint32)((uint32)0U << 24U) /* C2TDELAY */
| (uint32)((uint32)1U << 16U) /* T2CDELAY */
| (uint32)((uint32)0U << 8U) /* T2EDELAY */
| (uint32)((uint32)0U << 0U); /* C2EDELAY */

/** - Data Format 0 */
spiREG1->FMT0 = (uint32)((uint32)0U << 24U) /* wdelay */
| (uint32)((uint32)0U << 23U) /* parity Polarity */
| (uint32)((uint32)0U << 22U) /* parity enable */
| (uint32)((uint32)0U << 21U) /* wait on enable */
| (uint32)((uint32)0U << 20U) /* shift direction */
| (uint32)((uint32)1U << 17U) /* clock polarity */
| (uint32)((uint32)0U << 16U) /* clock phase */
| (uint32)((uint32)159U << 8U) /* baudrate prescale */
| (uint32)((uint32)16U << 0U); /* data word length */

/** - Data Format 1 */
spiREG1->FMT1 = (uint32)((uint32)0U << 24U) /* wdelay */
| (uint32)((uint32)0U << 23U) /* parity Polarity */
| (uint32)((uint32)0U << 22U) /* parity enable */
| (uint32)((uint32)0U << 21U) /* wait on enable */
| (uint32)((uint32)0U << 20U) /* shift direction */
| (uint32)((uint32)1U << 17U) /* clock polarity */
| (uint32)((uint32)0U << 16U) /* clock phase */
| (uint32)((uint32)159U << 8U) /* baudrate prescale */
| (uint32)((uint32)16U << 0U); /* data word length */

/** - Data Format 2 */
spiREG1->FMT2 = (uint32)((uint32)0U << 24U) /* wdelay */
| (uint32)((uint32)0U << 23U) /* parity Polarity */
| (uint32)((uint32)0U << 22U) /* parity enable */
| (uint32)((uint32)0U << 21U) /* wait on enable */
| (uint32)((uint32)0U << 20U) /* shift direction */
| (uint32)((uint32)1U << 17U) /* clock polarity */
| (uint32)((uint32)0U << 16U) /* clock phase */
| (uint32)((uint32)159U << 8U) /* baudrate prescale */
| (uint32)((uint32)16U << 0U); /* data word length */

/** - Data Format 3 */
spiREG1->FMT3 = (uint32)((uint32)0U << 24U) /* wdelay */
| (uint32)((uint32)0U << 23U) /* parity Polarity */
| (uint32)((uint32)0U << 22U) /* parity enable */
| (uint32)((uint32)0U << 21U) /* wait on enable */
| (uint32)((uint32)0U << 20U) /* shift direction */
| (uint32)((uint32)1U << 17U) /* clock polarity */
| (uint32)((uint32)0U << 16U) /* clock phase */
| (uint32)((uint32)159U << 8U) /* baudrate prescale */
| (uint32)((uint32)16U << 0U); /* data word length */

/** - set interrupt levels */
spiREG1->LVL = (uint32)((uint32)0U << 9U) /* TXINT */
| (uint32)((uint32)0U << 8U) /* RXINT */
| (uint32)((uint32)0U << 6U) /* OVRNINT */
| (uint32)((uint32)0U << 4U) /* BITERR */
| (uint32)((uint32)0U << 3U) /* DESYNC */
| (uint32)((uint32)0U << 2U) /* PARERR */
| (uint32)((uint32)0U << 1U) /* TIMEOUT */
| (uint32)((uint32)0U << 0U); /* DLENERR */

/** - clear any pending interrupts */
spiREG1->FLG |= 0xFFFFU;

/** - enable interrupts */
spiREG1->INT0 = (spiREG1->INT0 & 0xFFFF0000U)
| (uint32)((uint32)0U << 9U) /* TXINT */
| (uint32)((uint32)0U << 8U) /* RXINT */
| (uint32)((uint32)0U << 6U) /* OVRNINT */
| (uint32)((uint32)0U << 4U) /* BITERR */
| (uint32)((uint32)0U << 3U) /* DESYNC */
| (uint32)((uint32)0U << 2U) /* PARERR */
| (uint32)((uint32)0U << 1U) /* TIMEOUT */
| (uint32)((uint32)0U << 0U); /* DLENERR */

/** @b initialize @b SPI1 @b Port */

/** - SPI1 Port output values */
spiREG1->PC3 = (uint32)((uint32)1U << 0U) /* SCS[0] */
| (uint32)((uint32)1U << 1U) /* SCS[1] */
| (uint32)((uint32)1U << 2U) /* SCS[2] */
| (uint32)((uint32)1U << 3U) /* SCS[3] */
| (uint32)((uint32)1U << 4U) /* SCS[4] */
| (uint32)((uint32)1U << 5U) /* SCS[5] */
| (uint32)((uint32)0U << 8U) /* ENA */
| (uint32)((uint32)1U << 9U) /* CLK */
| (uint32)((uint32)0U << 10U) /* SIMO[0] */
| (uint32)((uint32)0U << 11U) /* SOMI[0] */
| (uint32)((uint32)0U << 17U) /* SIMO[1] */
| (uint32)((uint32)0U << 25U); /* SOMI[1] */

/** - SPI1 Port direction */
spiREG1->PC1 = (uint32)((uint32)1U << 0U) /* SCS[0] */
| (uint32)((uint32)1U << 1U) /* SCS[1] */
| (uint32)((uint32)1U << 2U) /* SCS[2] */
| (uint32)((uint32)1U << 3U) /* SCS[3] */
| (uint32)((uint32)1U << 4U) /* SCS[4] */
| (uint32)((uint32)1U << 5U) /* SCS[5] */
| (uint32)((uint32)0U << 8U) /* ENA */
| (uint32)((uint32)1U << 9U) /* CLK */
| (uint32)((uint32)1U << 10U) /* SIMO[0] */
| (uint32)((uint32)0U << 11U) /* SOMI[0] */
| (uint32)((uint32)0U << 17U) /* SIMO[1] */
| (uint32)((uint32)0U << 25U); /* SOMI[1] */

/** - SPI1 Port open drain enable */
spiREG1->PC6 = (uint32)((uint32)0U << 0U) /* SCS[0] */
| (uint32)((uint32)0U << 1U) /* SCS[1] */
| (uint32)((uint32)0U << 2U) /* SCS[2] */
| (uint32)((uint32)0U << 3U) /* SCS[3] */
| (uint32)((uint32)0U << 4U) /* SCS[4] */
| (uint32)((uint32)0U << 5U) /* SCS[5] */
| (uint32)((uint32)0U << 8U) /* ENA */
| (uint32)((uint32)0U << 9U) /* CLK */
| (uint32)((uint32)0U << 10U) /* SIMO[0] */
| (uint32)((uint32)0U << 11U) /* SOMI[0] */
| (uint32)((uint32)0U << 17U) /* SIMO[1] */
| (uint32)((uint32)0U << 25U); /* SOMI[1] */

/** - SPI1 Port pullup / pulldown selection */
spiREG1->PC8 = (uint32)((uint32)1U << 0U) /* SCS[0] */
| (uint32)((uint32)1U << 1U) /* SCS[1] */
| (uint32)((uint32)1U << 2U) /* SCS[2] */
| (uint32)((uint32)1U << 3U) /* SCS[3] */
| (uint32)((uint32)1U << 4U) /* SCS[4] */
| (uint32)((uint32)1U << 5U) /* SCS[5] */
| (uint32)((uint32)1U << 8U) /* ENA */
| (uint32)((uint32)1U << 9U) /* CLK */
| (uint32)((uint32)1U << 10U) /* SIMO[0] */
| (uint32)((uint32)1U << 11U) /* SOMI[0] */
| (uint32)((uint32)1U << 17U) /* SIMO[1] */
| (uint32)((uint32)1U << 25U); /* SOMI[1] */

/** - SPI1 Port pullup / pulldown enable*/
spiREG1->PC7 = (uint32)((uint32)0U << 0U) /* SCS[0] */
| (uint32)((uint32)0U << 1U) /* SCS[1] */
| (uint32)((uint32)0U << 2U) /* SCS[2] */
| (uint32)((uint32)0U << 3U) /* SCS[3] */
| (uint32)((uint32)0U << 4U) /* SCS[4] */
| (uint32)((uint32)0U << 5U) /* SCS[5] */
| (uint32)((uint32)0U << 8U) /* ENA */
| (uint32)((uint32)0U << 9U) /* CLK */
| (uint32)((uint32)0U << 10U) /* SIMO[0] */
| (uint32)((uint32)0U << 11U) /* SOMI[0] */
| (uint32)((uint32)0U << 17U) /* SIMO[1] */
| (uint32)((uint32)0U << 25U); /* SOMI[1] */

/* SPI1 set all pins to functional */
spiREG1->PC0 = (uint32)((uint32)0U << 0U) /* SCS[0] */
| (uint32)((uint32)0U << 1U) /* SCS[1] */
| (uint32)((uint32)0U << 2U) /* SCS[2] */
| (uint32)((uint32)0U << 3U) /* SCS[3] */
| (uint32)((uint32)0U << 4U) /* SCS[4] */
| (uint32)((uint32)1U << 5U) /* SCS[5] */
| (uint32)((uint32)0U << 8U) /* ENA */
| (uint32)((uint32)1U << 9U) /* CLK */
| (uint32)((uint32)1U << 10U) /* SIMO[0] */
| (uint32)((uint32)1U << 11U) /* SOMI[0] */
| (uint32)((uint32)0U << 17U) /* SIMO[1] */
| (uint32)((uint32)0U << 25U); /* SOMI[1] */

/** - Initialize TX and RX data buffer Status */
g_spiPacket_t[0U].tx_data_status = SPI_READY;
g_spiPacket_t[0U].rx_data_status = SPI_READY;

/** - Finally start SPI1 */
spiREG1->GCR1 = (spiREG1->GCR1 & 0xFEFFFFFFU) | 0x01000000U;

0 QJ Wang over 3 years ago in reply to Rick Henderson1

TI__Guru**** 186196 points

Can you try different clock polarity and clock phase? It looks like that the input data is not latched properly.

0 Rick Henderson1 over 3 years ago in reply to QJ Wang

Prodigy 130 points

I just tried all four possible combinations of clock polarity and phase and verified the changes with a logic analyzer.

The original configuration as shown in the init code I sent earlier is the only mode where the external accelerometer responds correctly as it is dictating the SPI configuration. All data formats are identical but I am only using #2.

I added test code to check the SPI Flag register (SPI1FLG) and the SPI RXBUF register. The value I receive in SPI1FLG is always 0x00000200 and SPI1RXBUF is always 0x801F0000.

I have used SPI ports on successfully several different micros including one using this same accelerometer but this one has me puzzled.

Thanks.

Rick

0 QJ Wang over 3 years ago in reply to Rick Henderson1

TI__Guru**** 186196 points

Hello Rick,

If the external accelerometer need longer setup time, you can increase the C2TDELAY to give accelerometer more time to prepare the data and output the data at the right clock edge.

Please try a increased C2TDELAY.

0 Rick Henderson1 over 3 years ago in reply to QJ Wang

Prodigy 130 points

Hello QJ,

The accelerometer is working fine. It's the SPI1 MISO that is the problem. Using a logic analyzer I verified that the accelerometer is properly initialized using SPI1 and I can continuously get correct data from the device. However, even though the correct data appears on the logic analyzer line connected to SPI1 MISO, I can't READ the SPI1 MISO data. I always get all zeros.

I don't see how changing the clock phase or polarity would make the SPIBUF always be zero. If it was wrong I would still expect garbage data from the MISO. As as I stated in my previous email I have configured the clock according to the accelerometer's requirements and which SPI1 supposedly supports.

Thanks.

0 QJ Wang over 3 years ago in reply to Rick Henderson1

TI__Guru**** 186196 points

Maybe I missed something, I will read your code again, and come back to you later.

0 whong zhao over 3 years ago in reply to Rick Henderson1

Genius 4080 points

Hello

Please try my code，and result tell me .

————————————————————

uint16_t command;//you send data;

uint16_t result;//you receive data;

spiREG1->DAT1 = 0x04FE0000 | command;
while((spiREG1->FLG & 0x100)!=0x100);
result = (spiREG1->BUF) & 0xFF;

0 Rick Henderson1 over 3 years ago in reply to whong zhao

Prodigy 130 points

Hello,

The code you sent me does not enable the correct CS line as FE selects CS_0 and I am using CS_5. As a result the accelerometer never receives the data, never transmits and the receive flag bit is never set and the system locks up in the while loop. I am using the SPI_CS_5 = 0xDFU as provided by HalCoGen to enable the chip select for the accelerometer.

Rick

0 Rick Henderson1 over 3 years ago in reply to whong zhao

Prodigy 130 points

Hello again,

I have attached a screen capture of my SPI1 transmit/receive and the read and write protocol for the accelerometer. The first 8 bits of the MOSI line is the accelerometer register I am requesting data from. The last 8 bits of the MOSI line are set high as they are a don't care.

The last 8 bits of the MISO line is the correct data read from the accelerometer for the address sent. What I expect to see in RXDATA is 0xFF9A from this specific example. Instead, I get all zeroes and the Receive flag is never set.

Can you see any timing or receive bit mistakes that would prevent the RXDATA field of SPIBUF to consistently register all zeroes? My data format is set to 16-bit and on other micros that I have used the SPI port, the receive buffer starts clocking bits into the shift register as soon as the clock edges are valid.

Am I missing something on the receive operation or configuration?

Thanks.

Rick

0 Rick Henderson1 over 3 years ago in reply to Rick Henderson1

Prodigy 130 points

I forgot to add one more test I did.

I disconnected pin 94 MISO from the accelerometer, reconfigured it as a GIO output, ran a test loop that simply toggles the pin and it works correctly. The hardware connection is good.

Rick

0 whong zhao over 3 years ago in reply to Rick Henderson1

Genius 4080 points

Hello

can't see picture

HCG software File post up .I think a problem with the configuration.

0 QJ Wang over 3 years ago in reply to whong zhao

TI__Guru**** 186196 points

Hi Rick,

Can you please re-post the screenshots which are posted correctly?

1. Please save the screenshot to jpg image file

2. click "insert file" button to upload the jpg image

0 QJ Wang over 3 years ago in reply to QJ Wang

TI__Guru**** 186196 points

Double check to make sure SPI1SOMI[0] is configured as functional signal rather than GIO signal:

0 Rick Henderson1 over 3 years ago in reply to QJ Wang

Prodigy 130 points

Hello QJ,

Thank you for your emails. I have the SPI1 working now, the receive buffer flag and SPI1 BUF can be read with the correct data.

The SPI1 registers were configured correctly and per your information. This was an existing project I was assigned to and I discovered an initialization for a different SPI port was incorrect and was corrupting SPI1.

Thank you for your help and your patience.

Rick

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TMS570LS1227: SPI1 MISO Receive Buffer Problem