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MSP430F5438A-EP: Oscillator Fault Flag is being set during large temperature changes

Jason Higuchi
Prodigy 10 points
Part Number: MSP430F5438A-EP

Hi,

I am having difficulty in characterizing a problem on a board using the MSP430F5438A-EP as a peripheral communication device. During temperature testing, when the unit is ramped from -50 C to 60 C or from 60 C to -50 C, it will arbitrarily set an oscillator fault regarding the external high frequency crystal XT1, which incidentally switches the SMCLK from XT1 to DCOCLKDIV (SMCLK is referencing XT1 for purposes of keeping UART baud drift due to temperature down). This fault has seemed to only occur during the temperature ramp and not the soaking periods at the extreme ends, though this is tentative. More so, I have been only been able to reproduce this issue when the PCB is sealed in its metal enclosure. Furthermore, this problem has only showed up on only one of the boards we have sent out.

To be clear, my main objective is to understand the problem and to report back to the customer (but determining a permanent solution is not completely out of the question at this time). Any thoughts, experiences, or potential areas of investigation related to this problem would be welcome.

Thanks,

Jason

  • 0
    TI__Mastermind 28286 points

    Hi Jason,

    I find that " problem has only showed up on only one of the boards we have sent out"

    Do you try to did A-B-A test? Like change a crystal?

    Thanks!

    Best Regards

    Johnson

  • 0
    Prodigy 10 points

    Hi Johnson,

    Thanks for the reply. I have not changed out the crystal yet. And I have been hesitant to quickly make changes to the board to diagnose the problem in hopes the board can be repaired and salvaged for use, but that seems not to be an option now. I will probably do that soon.

    On another note, reviewing the design of the board, I think I might have noticed a discrepancy with the datasheet's recommended operating conditions, and that is the ratio of C_DVCC to C_VCORE. The recommended ratio of DVCC capacitance to to VCORE capacitance is 10 to 1, meaning the recommended VCORE capacitance of 470 nF should be matched with 4.7 uF decoupling capacitors on DVCC pins. This board only provides 1.5 uF of decoupling on DVCC. In general, could this cause strange behavior such as the one I am seeing on the MSP430 MCU or is this recommendation primarily for noise mitigation on the voltage rail?

    Thanks,

    Jason

  • 0
    Expert 2981 points

    Jason:

    An oscillator fault handler routine is typically used for preparing the MSP430 for work. It creates a delay in the flow of program execution until the oscillator fault flag is cleared.

    Hope that helps in some way.

  • 0
    Guru 88410 points

    I haven't used the F5438A, but this sounds suspiciously like the DCO-saturation thing from the FR2 series. In that, the DCO setting starts "off-center" in the RSEL range, and doesn't have enough "swing" to correct over the entire temperature range. Saturation at DCO=0x1F or 0x00 would result in a DCOFFG. [Ref User Guide (SLAU208Q) Sec 5.2.12 paragraph 4].

    Interesting evidence would be the contents of UCSCTL0/1. I wonder if there's value in a "Software_Trim()" equivalent for the F5 series?

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