in slau367 @ page 829 stands:
"but it can hold SCL low if intervention of the CPU is required after a byte has been
Question is: how can I hold the SCL line low, to signal to the master that some processing must be done?
Direct after reading the rx-buffer the usci i2c module sends an ACK and the master can't recognize that the last command must be processed. Imho holding SCL low while waiting for ACK is the only way for the slave to do this.