Other Parts Discussed in Thread: MSP430FR5969
Trying to send ADC data to UART but after some samples it stops working. I Attached herewith 2 sample codes . In one I am reading ADC value and sending it to UART which is working OK, but I have to use Timer with it to create some trigger pulses , with timer it is creating issue , it continuously reading 4095 as a ADC reading where as without timer it works perfectly. please guide on it.
#include "driverlib.h" #define TIMER_PERIOD 88000 #define DUTY_CYCLE1 87936 #define DUTY_CYCLE2 87996 #define DUTY_CYCLE3 87563 #define DUTY_CYCLE4 87563 //#define DUTY_CYCLE3 87737 //#define DUTY_CYCLE4 87737 uint16_t i; uint8_t RXData = 0, TXData = 0; uint8_t check = 0; uint16_t compVal = 87699 ; uint16_t ADC_Data; void main (void) { // stop watchdog WDT_A_hold(WDT_A_BASE); //P4.0 and P4.1 output //P4.0 and P4.1 options select GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P3,GPIO_PIN0,GPIO_TERNARY_MODULE_FUNCTION);//For ADC //For UART GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_PJ,GPIO_PIN4 + GPIO_PIN5,GPIO_PRIMARY_MODULE_FUNCTION); GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P2,GPIO_PIN0 + GPIO_PIN1,GPIO_SECONDARY_MODULE_FUNCTION); PMM_unlockLPM5(); ///////////////////////////////////////UART/////////////////////////////////////// // Configure UART EUSCI_A_UART_initParam paramuart = {0}; paramuart.selectClockSource = EUSCI_A_UART_CLOCKSOURCE_SMCLK; paramuart.clockPrescalar = 104; paramuart.firstModReg = 0; paramuart.secondModReg = 0xD6; paramuart.parity = EUSCI_A_UART_NO_PARITY; paramuart.msborLsbFirst = EUSCI_A_UART_LSB_FIRST; paramuart.numberofStopBits = EUSCI_A_UART_ONE_STOP_BIT; paramuart.uartMode = EUSCI_A_UART_MODE; paramuart.overSampling = EUSCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION; if (STATUS_FAIL == EUSCI_A_UART_init(EUSCI_A0_BASE, ¶muart)) { return; } EUSCI_A_UART_enable(EUSCI_A0_BASE); ////////////////////ADC ///////////////////////////////////////////////// ADC12_B_initParam initParam = {0}; initParam.sampleHoldSignalSourceSelect = ADC12_B_SAMPLEHOLDSOURCE_SC; initParam.clockSourceSelect = ADC12_B_CLOCKSOURCE_SMCLK; initParam.clockSourceDivider = ADC12_B_CLOCKDIVIDER_1 ; initParam.clockSourcePredivider = ADC12_B_CLOCKPREDIVIDER__1; initParam.internalChannelMap = ADC12_B_NOINTCH; ADC12_B_init(ADC12_B_BASE, &initParam); //Enable the ADC12B module ADC12_B_enable(ADC12_B_BASE); ADC12_B_setupSamplingTimer(ADC12_B_BASE,ADC12_B_CYCLEHOLD_16_CYCLES,ADC12_B_CYCLEHOLD_4_CYCLES,ADC12_B_MULTIPLESAMPLESENABLE); ADC12_B_configureMemoryParam configureMemoryParam = {0}; configureMemoryParam.memoryBufferControlIndex = ADC12_B_MEMORY_0; configureMemoryParam.inputSourceSelect = ADC12_B_INPUT_A12; configureMemoryParam.refVoltageSourceSelect = ADC12_B_VREFPOS_EXTPOS_VREFNEG_VSS; configureMemoryParam.endOfSequence = ADC12_B_NOTENDOFSEQUENCE; configureMemoryParam.windowComparatorSelect = ADC12_B_WINDOW_COMPARATOR_DISABLE; configureMemoryParam.differentialModeSelect = ADC12_B_DIFFERENTIAL_MODE_DISABLE; ADC12_B_configureMemory(ADC12_B_BASE, &configureMemoryParam); ADC12_B_clearInterrupt(ADC12_B_BASE,0,ADC12_B_IFG0); ADC12_B_enableInterrupt(ADC12_B_BASE,ADC12_B_IE0,0,0); __delay_cycles(75); // reference settling ~75us while(1) { __delay_cycles(10000); // Delay between conversions ADC12_B_startConversion(ADC12_B_BASE,ADC12_B_MEMORY_0,ADC12_B_SINGLECHANNEL); __bis_SR_register(LPM0_bits + GIE); // LPM0, ADC10_ISR will force exit __no_operation(); // For debug only } } #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) #pragma vector=ADC12_VECTOR __interrupt #elif defined(__GNUC__) __attribute__((interrupt(ADC12_VECTOR))) #endif void ADC12_ISR(void) { switch(__even_in_range(ADC12IV,12)) { case 0: break; // Vector 0: No interrupt case 2: break; // Vector 2: ADC12BMEMx Overflow case 4: break; // Vector 4: Conversion time overflow case 6: break; // Vector 6: ADC12BHI case 8: break; // Vector 8: ADC12BLO case 10: break; // Vector 10: ADC12BIN case 12: // Vector 12: ADC12BMEM0 Interrupt ADC_Data = ADC12MEM0 & 0xfff; TXData = ADC_Data>>8; EUSCI_A_UART_transmitData(EUSCI_A0_BASE,TXData); TXData = ADC_Data & 0xff; EUSCI_A_UART_transmitData(EUSCI_A0_BASE,TXData); _bic_SR_register_on_exit(LPM0_bits); // Exit active CPU break; // Clear CPUOFF bit from 0(SR) case 14: break; // Vector 14: ADC12BMEM1 case 16: break; // Vector 16: ADC12BMEM2 case 18: break; // Vector 18: ADC12BMEM3 case 20: break; // Vector 20: ADC12BMEM4 case 22: break; // Vector 22: ADC12BMEM5 case 24: break; // Vector 24: ADC12BMEM6 case 26: break; // Vector 26: ADC12BMEM7 case 28: break; // Vector 28: ADC12BMEM8 case 30: break; // Vector 30: ADC12BMEM9 case 32: break; // Vector 32: ADC12BMEM10 case 34: break; // Vector 34: ADC12BMEM11 case 36: break; // Vector 36: ADC12BMEM12 case 38: break; // Vector 38: ADC12BMEM13 case 40: break; // Vector 40: ADC12BMEM14 case 42: break; // Vector 42: ADC12BMEM15 case 44: break; // Vector 44: ADC12BMEM16 case 46: break; // Vector 46: ADC12BMEM17 case 48: break; // Vector 48: ADC12BMEM18 case 50: break; // Vector 50: ADC12BMEM19 case 52: break; // Vector 52: ADC12BMEM20 case 54: break; // Vector 54: ADC12BMEM21 case 56: break; // Vector 56: ADC12BMEM22 case 58: break; // Vector 58: ADC12BMEM23 case 60: break; // Vector 60: ADC12BMEM24 case 62: break; // Vector 62: ADC12BMEM25 case 64: break; // Vector 64: ADC12BMEM26 case 66: break; // Vector 66: ADC12BMEM27 case 68: break; // Vector 68: ADC12BMEM28 case 70: break; // Vector 70: ADC12BMEM29 case 72: break; // Vector 72: ADC12BMEM30 case 74: break; // Vector 74: ADC12BMEM31 case 76: break; // Vector 76: ADC12BRDY default: break; } }
#include "driverlib.h" #define TIMER_PERIOD 88000 #define DUTY_CYCLE1 87936 #define DUTY_CYCLE2 87996 #define DUTY_CYCLE3 87563 #define DUTY_CYCLE4 87563 //#define DUTY_CYCLE3 87737 //#define DUTY_CYCLE4 87737 uint16_t i; uint8_t RXData = 0, TXData = 0; uint8_t check = 0; uint16_t compVal = 87699 ; uint16_t ADC_Data; void main (void) { // stop watchdog WDT_A_hold(WDT_A_BASE); //P4.0 and P4.1 output //P4.0 and P4.1 options select GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P1,GPIO_PIN2,GPIO_PRIMARY_MODULE_FUNCTION); GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P1,GPIO_PIN3,GPIO_PRIMARY_MODULE_FUNCTION); GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P1,GPIO_PIN6,GPIO_PRIMARY_MODULE_FUNCTION); GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P4,GPIO_PIN4,GPIO_PRIMARY_MODULE_FUNCTION); GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P3,GPIO_PIN0,GPIO_TERNARY_MODULE_FUNCTION);//For ADC //For UART GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_PJ,GPIO_PIN4 + GPIO_PIN5,GPIO_PRIMARY_MODULE_FUNCTION); GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P2,GPIO_PIN0 + GPIO_PIN1,GPIO_SECONDARY_MODULE_FUNCTION); PMM_unlockLPM5(); //Start timer Timer_A_initUpModeParam param = {0}; param.clockSource = TIMER_A_CLOCKSOURCE_SMCLK; param.clockSourceDivider = TIMER_A_CLOCKSOURCE_DIVIDER_1; param.timerPeriod = TIMER_PERIOD; param.timerInterruptEnable_TAIE = TIMER_A_TAIE_INTERRUPT_DISABLE; param.captureCompareInterruptEnable_CCR0_CCIE = TIMER_A_CCIE_CCR0_INTERRUPT_DISABLE; param.timerClear = TIMER_A_DO_CLEAR; param.startTimer = false; Timer_A_initUpMode(TIMER_A1_BASE, ¶m); Timer_A_startCounter( TIMER_A1_BASE,TIMER_A_UP_MODE); //Initialize compare mode to generate PWM1 Timer_A_initCompareModeParam initComp1Param = {0}; initComp1Param.compareRegister = TIMER_A_CAPTURECOMPARE_REGISTER_1; initComp1Param.compareInterruptEnable = TIMER_A_CAPTURECOMPARE_INTERRUPT_DISABLE; initComp1Param.compareOutputMode = TIMER_A_OUTPUTMODE_RESET_SET; initComp1Param.compareValue = DUTY_CYCLE1; Timer_A_initCompareMode(TIMER_A1_BASE, &initComp1Param); ///////////////////////////////////////UART/////////////////////////////////////// // Configure UART EUSCI_A_UART_initParam paramuart = {0}; paramuart.selectClockSource = EUSCI_A_UART_CLOCKSOURCE_SMCLK; paramuart.clockPrescalar = 104; paramuart.firstModReg = 0; paramuart.secondModReg = 0xD6; paramuart.parity = EUSCI_A_UART_NO_PARITY; paramuart.msborLsbFirst = EUSCI_A_UART_LSB_FIRST; paramuart.numberofStopBits = EUSCI_A_UART_ONE_STOP_BIT; paramuart.uartMode = EUSCI_A_UART_MODE; paramuart.overSampling = EUSCI_A_UART_LOW_FREQUENCY_BAUDRATE_GENERATION; if (STATUS_FAIL == EUSCI_A_UART_init(EUSCI_A0_BASE, ¶muart)) { return; } EUSCI_A_UART_enable(EUSCI_A0_BASE); ////////////////////ADC ///////////////////////////////////////////////// ADC12_B_initParam initParam = {0}; initParam.sampleHoldSignalSourceSelect = ADC12_B_SAMPLEHOLDSOURCE_SC; initParam.clockSourceSelect = ADC12_B_CLOCKSOURCE_SMCLK; initParam.clockSourceDivider = ADC12_B_CLOCKDIVIDER_1 ; initParam.clockSourcePredivider = ADC12_B_CLOCKPREDIVIDER__1; initParam.internalChannelMap = ADC12_B_NOINTCH; ADC12_B_init(ADC12_B_BASE, &initParam); //Enable the ADC12B module ADC12_B_enable(ADC12_B_BASE); ADC12_B_setupSamplingTimer(ADC12_B_BASE,ADC12_B_CYCLEHOLD_16_CYCLES,ADC12_B_CYCLEHOLD_4_CYCLES,ADC12_B_MULTIPLESAMPLESENABLE); ADC12_B_configureMemoryParam configureMemoryParam = {0}; configureMemoryParam.memoryBufferControlIndex = ADC12_B_MEMORY_0; configureMemoryParam.inputSourceSelect = ADC12_B_INPUT_A12; configureMemoryParam.refVoltageSourceSelect = ADC12_B_VREFPOS_EXTPOS_VREFNEG_VSS; configureMemoryParam.endOfSequence = ADC12_B_NOTENDOFSEQUENCE; configureMemoryParam.windowComparatorSelect = ADC12_B_WINDOW_COMPARATOR_DISABLE; configureMemoryParam.differentialModeSelect = ADC12_B_DIFFERENTIAL_MODE_DISABLE; ADC12_B_configureMemory(ADC12_B_BASE, &configureMemoryParam); ADC12_B_clearInterrupt(ADC12_B_BASE,0,ADC12_B_IFG0); ADC12_B_enableInterrupt(ADC12_B_BASE,ADC12_B_IE0,0,0); __delay_cycles(75); // reference settling ~75us while(1) { __delay_cycles(10000); // Delay between conversions ADC12_B_startConversion(ADC12_B_BASE,ADC12_B_MEMORY_0,ADC12_B_SINGLECHANNEL); __bis_SR_register(LPM0_bits + GIE); // LPM0, ADC10_ISR will force exit __no_operation(); // For debug only } } #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) #pragma vector=ADC12_VECTOR __interrupt #elif defined(__GNUC__) __attribute__((interrupt(ADC12_VECTOR))) #endif void ADC12_ISR(void) { switch(__even_in_range(ADC12IV,12)) { case 0: break; // Vector 0: No interrupt case 2: break; // Vector 2: ADC12BMEMx Overflow case 4: break; // Vector 4: Conversion time overflow case 6: break; // Vector 6: ADC12BHI case 8: break; // Vector 8: ADC12BLO case 10: break; // Vector 10: ADC12BIN case 12: // Vector 12: ADC12BMEM0 Interrupt ADC_Data = ADC12MEM0 & 0xfff; TXData = ADC_Data>>8; EUSCI_A_UART_transmitData(EUSCI_A0_BASE,TXData); TXData = ADC_Data & 0xff; EUSCI_A_UART_transmitData(EUSCI_A0_BASE,TXData); _bic_SR_register_on_exit(LPM0_bits); // Exit active CPU break; // Clear CPUOFF bit from 0(SR) case 14: break; // Vector 14: ADC12BMEM1 case 16: break; // Vector 16: ADC12BMEM2 case 18: break; // Vector 18: ADC12BMEM3 case 20: break; // Vector 20: ADC12BMEM4 case 22: break; // Vector 22: ADC12BMEM5 case 24: break; // Vector 24: ADC12BMEM6 case 26: break; // Vector 26: ADC12BMEM7 case 28: break; // Vector 28: ADC12BMEM8 case 30: break; // Vector 30: ADC12BMEM9 case 32: break; // Vector 32: ADC12BMEM10 case 34: break; // Vector 34: ADC12BMEM11 case 36: break; // Vector 36: ADC12BMEM12 case 38: break; // Vector 38: ADC12BMEM13 case 40: break; // Vector 40: ADC12BMEM14 case 42: break; // Vector 42: ADC12BMEM15 case 44: break; // Vector 44: ADC12BMEM16 case 46: break; // Vector 46: ADC12BMEM17 case 48: break; // Vector 48: ADC12BMEM18 case 50: break; // Vector 50: ADC12BMEM19 case 52: break; // Vector 52: ADC12BMEM20 case 54: break; // Vector 54: ADC12BMEM21 case 56: break; // Vector 56: ADC12BMEM22 case 58: break; // Vector 58: ADC12BMEM23 case 60: break; // Vector 60: ADC12BMEM24 case 62: break; // Vector 62: ADC12BMEM25 case 64: break; // Vector 64: ADC12BMEM26 case 66: break; // Vector 66: ADC12BMEM27 case 68: break; // Vector 68: ADC12BMEM28 case 70: break; // Vector 70: ADC12BMEM29 case 72: break; // Vector 72: ADC12BMEM30 case 74: break; // Vector 74: ADC12BMEM31 case 76: break; // Vector 76: ADC12BRDY default: break; } }