MSP430F2619S-HT: How does the MSP430F2619S-HT works with an external clock signal

Hi Kejun

First please check XT2OF bit to see if any fault there.

Second try use internal clock source to if MCLK can be out put correctly.

Hi Gary Gao

I modify my code below

    BCSCTL3 = XT2S_3;        //select external digital clock
    BCSCTL1 &= ~XT2OFF;        //XT2OFF is 0
    BCSCTL2 = DIVM_0 + DIVS_0;    //MCLK Divider is 1, SMCLK Divider is 1
    do
    {
        __delay_cycles( 100 );
        _ClrWdt();
    }while( XT2OF ==( BCSCTL3 & XT2OF) );

but I still DO NOT see a output clock signal on pin SMCLK, the UART module does not work(it works when DCO module is selected),

how do I know whether or not the clock switch successful from DCO to external digital clock signal?

Clark Wang

Hi Kejun

It seems you have not set the SELMx bit to 0x10 that select XT2 as clock source for MCLK.

Hi, Gary

I set the SELMx bit to 0x10, the signal frequency comes from MCLK is 1.1MHZ, not 8MHZ.

I do not care the MCLK now because  I supply the device with a seperated clock. I just care it can work with external clock signal, just it works with DCO clock signal.

Please tell me what's wrong I am.

You can try with XTN pin 8 that is works with below code that I have verified 

#include <msp430.h>

int main(void)
{
    volatile unsigned int i;
  WDTCTL = WDTPW + WDTHOLD;                 // Stop Watchdog Timer
  if (CALBC1_8MHZ==0xFF)                    // If calibration constant erased
  {
    while(1);                               // do not load, trap CPU!!
  }

  __bic_SR_register(OSCOFF); // enable LFXT1 oscillator

  BCSCTL1 |= XT2OFF + XTS; // LFXT1CLK is High Frequency
  BCSCTL3 |= LFXT1S0 + LFXT1S1;// Digital external 0.4- to 16-MHz clock source
  BCSCTL3 &= ~(XCAP0 + XCAP1);
  do // wait for oscillator to stablise
  {
  IFG1 &= ~OFIFG; // clear flag
  // do a delay of at least 50uS
  i = 0xFF;
  while (i > 0) i--;
  }
  while ((IFG1 & OFIFG) != 0);// repeat until flag remains cleared
  BCSCTL2 |= SELM1 + SELM0; // MCLK Source Select 3: LFXTCLK




  P5DIR |= 0x78;                            // P5.6,5,4,3 outputs
  P5SEL |= 0x70;                            // P5.6,5,4 options

  while (1)                                 // 10 MCLK cycle loop
  {
    P5OUT |= 0x08;                          // P5.3 = 1
    i = 50000;                              // Delay
    do (i--);
    while (i != 0);
    P5OUT &= ~0x08;                         // P5.3 = 0
    i = 50000;                              // Delay
    do (i--);
    while (i != 0);
  }
}

I have failed with XT2 too and try to find the reason there.

Hi Gary

Thank you for your help.

your code solved the problem which the external clock comes from MCLK only, my project code still does not work, it works depend on SMCLK such as UART, SPI and others. How the CPU works with an external clock signal just same it works with DCO clock signal?

Clark

If you want to configure the SMCLK, have you set SELS to 1? That  you can choose external clock for SMCLK

Hi Gary

I tried all the possibilites you told and all the possibilites the manual descripted. it does not work.

My code work very well with DCO, and I wish it work too with external clock. if you are able to figure out my

problems, you can ask some experienced engineer. I don't believe no body can solve this problem.

Clark

Hi Gary

I tried all the possibilites you told and all the possibilites the manual descripted. it does not work.

My code work very well with DCO, and I wish it work too with external clock. if you are able to figure out my

problems, you can ask some experienced engineer. I don't believe no body can solve this problem.

Clark

Hi Kejun

I have create a code to make the XT2 works with MCLK and SMCLK. You can try it.(Make it free run, don't make it in debug mode)

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//******************************************************************************
//  MSP430x26x Demo - Basic Clock, Output Buffered SMCLK, ACLK and MCLK/10
//
//  Description: Buffer ACLK on P5.6, SMCLK(DCO) on P5.5, MCLK on P5.4 and
//  MCLK/10 on P5.3.
//  ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = CALxxx_8MHZ = 8MHz
//  //* External watch crystal on XIN XOUT is required for ACLK *//
//
//            MSP430F261x/241x
//             -----------------
//         /|\|              XIN|-
//          | |                 | 32kHz
//          --|RST          XOUT|-
//            |                 |
//            |             P5.6|-->ACLK = 32kHz
//            |             P5.5|-->SMCLK = 8MHz
//            |             P5.4|-->MCLK = DCO
//            |             P5.3|-->MCLK/10
//
//  B. Nisarga
//  Texas Instruments Inc.
//  September 2007
//  Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.42A
//******************************************************************************
#include <msp430.h>

int main(void)
{
    volatile unsigned int i;
  WDTCTL = WDTPW + WDTHOLD;                 // Stop Watchdog Timer

  P5DIR |= BIT4|BIT5|BIT3;                            // P5.6,5,4,3 outputs
  P5SEL |= BIT4|BIT5;                            // P5.6,5,4 options

  __bic_SR_register(OSCOFF); // enable LFXT1 oscillator

  BCSCTL1 &= ~XT2OFF; // XT2 ON
  BCSCTL3 |= XT2S_3;// Digital external 0.4- to 16-MHz clock source
  BCSCTL3 &= ~XT2OF;
//  P5OUT |= BIT3;                          // P5.3 = 1
  do // wait for oscillator to stablise
  {
  IFG1 &= ~OFIFG; // clear flag
  // do a delay of at least 50uS
  i = 0xFF;
  while (i > 0) i--;
  }
  while ((IFG1 & OFIFG) != 0);// repeat until flag remains cleared
//  P5OUT &= ~BIT3;                         // P5.3 = 0
  do
  {
      __delay_cycles( 100 );
  }while( XT2OF ==( BCSCTL3 & XT2OF) );

  BCSCTL2 |= SELM1|SELS; // MCLK Source Select 3: LFXTCLK
//  P5OUT |= BIT3;                          // P5.3 = 1


  while (1)                                 // 10 MCLK cycle loop
  {
    P5OUT |= BIT3;                          // P5.3 = 1
    i = 50000;                              // Delay
    do (i--);
    while (i != 0);
    P5OUT &= ~BIT3;                         // P5.3 = 0
    i = 50000;                              // Delay
    do (i--);
    while (i != 0);
  }
}

I have got the wave capture below

XT2_G.sal