We are looking for some feedback on achieving the currents specified for LPM3.
We have a long established product, and are developing a new product based on it. Battery life improvement is a major goal.
After stripping down all ancillary hardware to only the processor, and creating a special software build to exercise LPM3 right after boot& config, we see 147uA after the super cap is connected and charged, a reliable 400uA when removing the power rail connection to the supercap, after it is charged.
So, the first question is what are considered the external currents as referenced in the Datasheet. See below data, as we have set all IO to out and high impedance float. So the CPU is effectively idle.
We do have the supercap with 100 ohm current limit from power rail, as part of the existing solution, but may eliminate it in the future; 16 MHz crystal, with RTC crystal as well.
3.29 v supply, while in LPM3, only connections are power....
function——pin—-voltage—— notes
Core. 25. 1.92v 0.47uF to GND
VBAK. 86. 3.29v. 4.7nF to GND
VBAT 87. 3.29v. 1F to GND
CPCAP 17 2.90 Open
reset’ 96 3.28v 1nF to GND, 51K pull-up to VCC
USB 77 0.05v Open, could tie to GND for tests, or sw config as output
USB 79 0.11v Open, could tie to GND for tests, or sw config as output
TDO 92 0 Normally an JTAG out - Floating input,, Grounded for tests
TDI 93 0 Normally an JTAG IN - Floating input,, Grounded for tests
TMS 94 0 Floating input,, Grounded for tests
TCK 95 0 Floating input,, Grounded for tests
Y2XTAL 84, 85 0
Y1XTAL 14,15 With Fluke both nodes read ~0.4v, with scope no action at / near ground
all other pins @ 0.0 volts, including TEST pin 91.
Thank You for Your review and thoughts! Be Well!