MSP430F2011: basic question on P1IV

I have the following ISR for port 1.....I am having issues with the switch.  If I come into the ISR and only BIT2, BIT4 or BIT5 are set the switch works but if I come into the ISR where BIT4 and BIT5 are both set the switch jumps right to default and neither gets executed.  This leads me to wonder how is it possible to have a switch in the ISR at all as you would have to have 128 separate case statements one for each iteration of BITs 0 -7 and all combinations.  How does p1 vector handle for example (PI1FG = 00110000 ) given the following below?

#pragma vector=PORT1_VECTOR
__interrupt void inputs(void)
{
    switch( P1IFG )
    {
    case 4:
        //trigger 1
        P1IE &= ~BIT2;
        P1IFG &= ~BIT2;
        ISR.trig1 = true;
        break;
    case 16:
        //trigger 2
        P1IE &= ~BIT4;
        P1IFG &= ~BIT4;
        ISR.trig2 = true;
        break;
    case 32:
        //debug mode enable debounce
        P1IE &= ~BIT5;
        P1IES ^= BIT5;
        P1IFG &= ~BIT5;
        CCR0 = (TAR + DEBOUNCE); //~~50ms
        CCTL0 &= ~CCIFG;
        CCTL0 |= CCIE;
        break;
    default:
        break;
    }
    LPM3_EXIT;
}