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MSP-EXP430F5529LP: Enabling the UART that talks out via the USB

David Summers
Intellectual 455 points
Part Number: MSP-EXP430F5529LP
Other Parts Discussed in Thread: MSP430F5529, , MSP430WARE

OK - I've obviously missed something.

On the MSP430F5529 development board, I'm enabled the external XT2 crystal @ 4MHz, and switched to that. Now trying to enable the UART that goes out via the USB connection. My code:

  // now set up USCI_A1
  // disable USCI A1
  HWREGB( USCI_A1_BASE | UCAxCTL1 ) |= UCSWRST;
  // Clock source SMCLK
  HWREGB( USCI_A1_BASE | UCAxCTL1 ) = 
    (HWREGB( USCI_A1_BASE | UCAxCTL1 )&0x3f)|0x80;
  // Configure UART
  // No Parity 0xc0 = 00
  // LSB first 0x20 = 0
  // UC7BIT = 8bit 0x10 = 0
  // One Stop bit 0x08 = 0
  // USCI mode = UART mode 0x06 = 00
  // Sync = async 0x01 = 0
  HWREGB( USCI_A1_BASE | UCAxCTL0 ) = 0x00;
  // 11520 baud params for 4MHz Clock
  // Prescalar = 2
  HWREGW( USCI_A1_BASE | UCAxBRW ) = 2;
  // First Modulation (0xf0) = 2
  // Second Modulation (0x0e) = 3
  // Oversampling (0x01) = 1
  HWREGW( USCI_A1_BASE | UCAxMCTL ) = 0x20|0x06|0x01;
  // disable interupts
  HWREGB( USCI_A1_BASE | UCAxIE ) = 0x00;
  // test going into SEL mode on P4.4 and P4.5
  HWREGB( P4_BASE | PxSEL ) |= BIT4|BIT5; 
  // Set P4.4 TX as output
  //  HWREGB( P4_BASE | PxDIR ) |= BIT4;
  // Set P4.5 RX as input
  //  HWREGB( P4_BASE | PxDIR ) &= ~BIT5;
  // enable USCI A1
  HWREGB( USCI_A1_BASE | UCAxCTL1 ) &= ~UCSWRST;

  char *string="We are go\n\0";

  char *idx=string;
  while (*idx!=0) {
    while ((HWREGB( USCI_A1_BASE | UCAxIFG )&UCTXIFG)==0);
    HWREGB( USCI_A1_BASE | UCAxTXBUF )=*idx++;
  }

On the computer connected to it - I write the code via /dev/ttyACM0 - so I assume thats the programming interface. The other serial device that is set up is /dev/ttyACM1 - and I'm listening to that port at 115200 baud. But I don't see the message. The rest of the code does run, which sets a led flashing - so the code above is all clearly run.

So question is what have I failed to set to see the output on the UART?

  • 0
    Intellectual 455 points

    Spotted one fault. UCAxMCTL is only a byte (8 bits) long, I was writing to it as a word (16 bits) long. Anyway changing that line makes no difference:

      // First Modulation (0xf0) = 2
  // Second Modulation (0x0e) = 3
  // Oversampling (0x01) = 1
  HWREGB( USCI_A1_BASE | UCAxMCTL ) = 0x20|0x06|0x01;

  • 0
    TI__Mastermind 32645 points
    David Summers said:
    Now trying to enable the UART that goes out via the USB connection

    Not clear about the information path. Could you give more detail description about it?

  • 0 in reply to Gary Gao
    Intellectual 455 points

    From slau533d.pdf the msp430f5529 USCI_A1 UART is wired into the eZ-FET lite Emulator MCU on the MSP-EXP430F5529LP development board. The eZ-FET lite then puts this UART out on the USB.

    On the host computer the USB brings up several interfaces, including two UART, one of which is used for programming the device, and the other I am  assuming is the USCI_A1 UART.

    Now as i wasn't clear if the eZ-FET UART to USB was working, I've also broken the link between msp430f5529 and the eZ-FET lite, and I'm now reading the UART with an FTDI cable - which also sees no data.

    Today I'll hopefully get time to go through simpleUsbBackchannel example, a quick look a few days ago - and seemed to have very similar code to mine, only difference was in the reading on if the UART buffer on the msp430 is ready to have another byte written.

    For programming the USCI interface inside the msp430, I'm following the instructions in slau208q.pdf - the family user guide for this device.

  • +1
    Guru 88700 points

    >HWREGB( P4_BASE | PxSEL ) |= BIT4|BIT5;

    I suspect you're actually setting P3SEL here. In my copy of msp430f5529.h, P4_BASE is the same as P3_BASE, so I can't think of a PxSEL value which would work for both. 

    driverlib uses (e.g.) P4_BASE as the base address of PB and then shifts the value to reference either P3 or P4. You can see this in the definition of (e.g.)  GPIO_setAsOutputPin(). On my system this is in:

    C:\ti\msp\MSP430Ware_3_80_13_03\driverlib\driverlib\MSP430F5xx_6xx\gpio.c

  • +1 in reply to Bruce McKenney47378
    Intellectual 455 points

    Hmm - yes thats interesting. Yes in msp430f5529.h Port3, Port4 and PortB Base all map to 0x0220. Checking driverlib gpio.c and the array GPIO_PORT_TO_BASE[] seems to use the value __MSP430_BASEADDRESS_PORT4_R__ - which again is 0x0220.

    Checking what is set, gpio.c uses and offset OFS_PASEL, which is defined in include/msp430f5xx_6xxgeneric.h as 0x000a, I in my header define PxSEL as 0x0a.

    So think both codes are writing to the address 0x22a to set SEL - but yes that seems identical for Port 3 and Port 4. Very confusing ....

    Let me see if its written in slau208q.pdf anywhere ....

    OK the msp430f5529 data sheet says that both Port 3 and Port 4 live under Port B - which explains the same address. But then how does one differentiate between P3 and P4 pins ...

    Ah got you now

       // Shift by 8 if port is even (upper 8-bits)
    if((selectedPort & 1) ^ 1) {
        selectedPins <<= 8;
    }

    Now 4 is even, so port 4 we have to set pins shifed by 8. So suggests

        P4SEL |= (BIT4+BIT5)<<8;         // Configure these pins as TXD/RXD

    Boy is that cryptic!

    And solution is in slau208q; P4SEL is on 0x22b, whilst P3SEL is on 0x22a. So it isn't the pin that is shifted, the address shifts by 1 for even ports. Now if writing to 0x22a as a 15bit word, can do the same by shifting the pins. Probably then the write should be as a word to PBSEL, as that is the register that takes words!

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