MSP430G2744: CCS Debug SR GIE 0

Hello Mari,

I would say not directly related, but could be. EEM20 is in reference to IFGs, not interrupt enable bits. However, if you set a breakpoint within an ISR, then you will see the GIE bit read "0" as that's part of the ISR routine. If during that breakpoint you are trying to enable another interrupt, but that corresponding IFG flag is already set, you may not get an interrupt as the CPU may miss the trigger due to debugger engagement. 

I also don't understand their test with basic blinky example, as there are not interrupts enabled in that. Is the customer enabling the interrupt they want to see by changing the corresponding interrupt enable bit for the module? And of course implementing the appropriate ISR routine in their code?

Hi Jace,

Thanks for your quick response! I've forwarded your response to them and have asked my customer if they are setting up the proper ISR routine and also enabling the interrupt bit. 

I will let you know if they have any follow-up.

Best regards,

Mari Tsunoda

Mari Tsunoda said:

When they are stopped at a breakpoint, and they try to add another software breakpoint/delete, then GIE in SR becomes 0 and masks the interrupt.

This matches the symptoms previously reported in CCS/MSP430F2274: Placing new software breakpoint clears GIE, preventing interrupts from triggering

It was a bug in the MSPDebugStack, not sure if it has been fixed yet.

Which version of CCS is your customer using?

Hi Chester,

Thanks for the update. I am currently checking with them what CCS version they are using and will let you know when they respond.

-Mari

Hi Chester,

They've provided a list of software and version number that they are using.

Software List.xlsx

-Mari

Hi Mari,

Thanks for providing that list. Your issue seems to be the same as the one linked by Chester. Even though that thread implies that there would be a fix in 2020Q2 I don't see anything in the MSPDebugStack changelog that makes me think a fix was released. 

I'm going to work internally to figure out what the status of this issue is. I hope to have an update by the end of the week.

I know it's a big annoyance, but in the meantime you will have to manually restore GIE after setting software breakpoints.

Regards,

Evan

Hi Evan,

Thanks for the update. I see, I will tell them to manually restore GIE.

Please keep me updated.

Best regards,

Mari Tsunoda

Hi Evan,

Thanks for your reply. I see, I will tell them to manually restore the GIE.

Please keep me updated!

Best regards,

Mari

Hi Mari,

After some internal discussions, we don't have a fix for this issue. If this is a deal breaker for the customer send me an email and we can discuss offline.

Thanks,

Evan

Hi Evan,

Thanks for the update.

I see in other threads linked by Chester that this error is a result of the workaround for FLASH31 errata on other devices. However, the G2744 doesn't have the FLASH31 errata listed. Is this listed on any documentation related to G2744?

Also, I just want to confirm but they just have to set the SR GIE bit to 1 in the register list in CCS debug screen correct? (see image below) If this is not correct, can you tell me how to set manually?

Would you also be able to tell me why it was concluded that there is no fix for this issue? 

Best regards,

Mari