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MSP-EXP430FR5994: DMAIV Register question

Part Number: MSP-EXP430FR5994

I am using SLASE54D Table 9-11 Trigger 16 UCA1RXIFG, UART receive. This document says DMA0IFG is the trigger for DMA Channel 1. When the DMA ISR triggers, should I be checking for DMAIV_DMA0IFG? 

However, the SLAU367P document says DMA0IFG is the interrupt flag for DMA Channel 0. Which is correct and why are the two documents saying different things?

  • Table 9-11 describes the DMA triggers -- the connection from the peripheral of interest into the DMA. It is possible (using the appropriate TSEL setting) to have the completion (DMA0IFG) from DMA0 trigger a separate operation on channel DMA1, but that's not what you're interested in doing.

    It sounds like you're using channel DMA0 with TSEL=16, so you're interested in catching the DMA0IFG directly, using DMAIV_DMA0IFG in your ISR. (You could also use TSEL=16 for channel DMA1 or DMA2, if you wanted, in which case you'd want DMAIV_DMA1IFG or DMAIV_DMA2IFG respectively.)

  • I am using TSEL=16 on DMA Channel 1 for UCA1RXIFG. I currently have the DMA_ISR using  DMAIV_DMA1IFG. Let me know if this is incorrect. I got confused by trigger 30.



  • That is the correct combination.

    Trigger 30 does something unrelated, that you're not interested in.

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