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LP-MSP430FR2476: how to root the MCLK out of my uc

Part Number: LP-MSP430FR2476
Other Parts Discussed in Thread: MSP430FR2476

Hello everybody,

I'm trying to check the MCLK signal on my MSP430FR2476 but i don't know how to select this function on my uc.

In generally, register PxSEL1 and PxSEL0 can be use to select the function (I have already do this for the MSCLK and it's work perfectly) but it seems doesn't work for this one.

this is my code : 

100

#include <msp430.h> 

void main(void)
{
    WDTCTL = WDTPW | WDTHOLD;   // stop watchdog timer

    // P1.3 with function 3 to use MCLK
    //measure : ?
    P1DIR  |=  BIT3;  // P1.3  output
    P1SEL0 &= ~BIT3;  //function 3 of P1.3 -> MCLK
    P1SEL1 |= BIT3;   //function 3 of P1.3 -> MCLK

    // P1.7 with function 2 to use SMCLK
    // measure : 1MHz
    P1DIR |=  BIT7;  // P1.7 output
    P1SEL1 |= BIT7;  //function 2 of P1.7 -> SMCLK

    while(1)
    {
        ;
    }

}

On the table 9-23 ( page 65) of the MSP430FR247x datasheet, I found a table mentioning a "JTAG" signal but I can't find it on my microcontroller, JTAG being an interface and not a simple GPIO....

Kindly help me.

Regards,

Aurelien

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