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MSP430FR5994: RTC Counter Mode Interrupt in Seconds

Part Number: MSP430FR5994

Hello, 

For the following RTC example below, how is the interrupt triggered every 1 second? If I did the math correctly, the output of RT1PS is 250 Hz: 34KHz/4 (RTCPS0CTL divides by 4) /16 (RTCPS1CTL divides by 16). 

So at 250Hz, the period would be given as .004 seconds. How does the code make this toggle the LED every 1 second?

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//******************************************************************************
//  MSP430FR69xx Demo - RTC in Counter Mode toggles P1.0 every 1s
//
//  This program demonstrates RTC in counter mode configured to source from ACLK
//  to toggle P1.0 LED every 1s.
//
//                MSP430FR6989
//             -----------------
//        /|\ |                 |
//         |  |              XIN|--
//         ---|RST              |  32768Hz
//            |             XOUT|--
//            |                 |
//            |             P1.0|-->LED
//
//   William Goh
//   Texas Instruments Inc.
//   August 2014
//   Built with IAR Embedded Workbench V5.60 & Code Composer Studio V6.0
//******************************************************************************

#include <msp430.h>

int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;               // Stop WDT

    P1OUT &= ~BIT0;
    P1DIR |= BIT0;

    PJSEL0 = BIT4 | BIT5;                   // Initialize LFXT pins

    // Disable the GPIO power-on default high-impedance mode to activate
    // previously configured port settings
    PM5CTL0 &= ~LOCKLPM5;

    // Configure LFXT 32kHz crystal
    CSCTL0_H = CSKEY >> 8;                  // Unlock CS registers
    CSCTL4 &= ~LFXTOFF;                     // Enable LFXT
    do
    {
      CSCTL5 &= ~LFXTOFFG;                  // Clear LFXT fault flag
      SFRIFG1 &= ~OFIFG;
    } while (SFRIFG1 & OFIFG);              // Test oscillator fault flag
    CSCTL0_H = 0;                           // Lock CS registers

    // Setup RTC Timer
    RTCCTL0_H = RTCKEY_H;                   // Unlock RTC

    RTCCTL0_L = RTCTEVIE;                   // RTC event interrupt enable
    RTCCTL1 = RTCSSEL_2 | RTCTEV_0 | RTCHOLD; // Counter Mode, RTC1PS, 8-bit ovf
    RTCPS0CTL = RT0PSDIV1;                  // ACLK, /8
    RTCPS1CTL = RT1SSEL1 | RT1PSDIV0 | RT1PSDIV1; // out from RT0PS, /16

    RTCCTL1 &= ~(RTCHOLD);                  // Start RTC

    __bis_SR_register(LPM3_bits | GIE);     // Enter LPM3 mode w/ interrupts enabled
    __no_operation();

    return 0;
}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=RTC_VECTOR
__interrupt void RTC_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(RTC_VECTOR))) RTC_ISR (void)
#else
#error Compiler not supported!
#endif
{
    switch(__even_in_range(RTCIV, RTCIV_RT1PSIFG))
    {
        case RTCIV_NONE:      break;        // No interrupts
        case RTCIV_RTCOFIFG:  break;        // RTCOFIFG
        case RTCIV_RTCRDYIFG: break;        // RTCRDYIFG
        case RTCIV_RTCTEVIFG:               // RTCEVIFG
            P1OUT ^= BIT0;                  // Toggle P1.0 LED
            break;
        case RTCIV_RTCAIFG:   break;        // RTCAIFG
        case RTCIV_RT0PSIFG:  break;        // RT0PSIFG
        case RTCIV_RT1PSIFG:  break;        // RT1PSIFG
        default: break;
    }
}

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