Generate 2 pulses using Timer A of MSP430F1132

Hi Thuc,

I suspect that the software overhead in the ISRs could be to blame here since the timer count you are going for is so low (only 26 cycles between your ISRs). This would explain why when you lengthened your count in your TACCRx registers, the timer began to behave as expected. If the ratio of cycles spent in the ISRs to cycles between ISRs (based on your TACCRx value) is too high, then your ISRs are going to be preventing timely interrupt service and thus affecting your timer output when you are using continuous mode. (This does not apply in up/down mode since in up/down mode everything is done in hardware - no ISRs needed).

I have been doing some experimenting myself lately with generating multiple PWM frequencies as well as duty cycles all off of a single timer module in continuous mode. As part of this I've done a little testing to determine a general guideline or "rule-of-thumb" for the maximum frequencies that can be reliably achieved with this method. There is a cutoff point that varies depending on the number of TACCRx registers you are using due to the latency added by your ISR code, which includes for each separate frequency generated:

•  the ISR entry time,
• wake-up time if coming from low power mode,
•  the decision logic for determining which TACCRx register triggered the interrupt (switch structure)
• and then adding the period offset to the TACCRx register to generate the new value.

 All of this adds time spent in the ISR where other interrupts can't come in, and the more frequencies you are generating the greater the effect (because you will be in the ISR a larger % of the time). Having any other ISRs in your system will also affect how high of a timer frequency you can generate with continuous mode because they can prevent you from servicing your timer interrupts.

In my own experimentation, I was creating the same frequency on all TACCRx registers as a sort of "worst case" and then seeing on a scope where the lowest priority signal furthest down the ISR would start becoming unreliable. I found that for my code in the case for generating two signals, you would start to get unreliable results if you used a period count of less than TACCRx += 50 when sourcing the timer from the same source as MCLK (your 26 case applies here). This value seemed to be consistent no matter what MCLK frequency was used, as it is really an indicator more dependent on the ratio of timer counts between interrupts  to cycles spent in the ISR. Note that this value is just a guideline, as it will depend on how you have written your ISR code and could vary with different output frequency combinations.

So for generating your 125kHz signal, you will probably need to use a higher frequency clock source for your timer or to use a second timer module (unfortunately F1132 only has one timer). Alternately, since your periods are direct multiples of each other, you could try using the timer in Up/Down mode so you don't have to do anything in the ISR to reload TACCR0, just set it to 26 at the beginning of the program. Then in the TACCR0 ISR you could toggle your second signal in software on every other pass. This still may not work with such a low timer count but it is something you could try.

Best of luck!

Katie