Tool/software:
I would like to understand the roles of Vinr1 and Vinr2. As per my understanding, these are the differential analog inputs to the PGA (Programmable Gain Amplifier).
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What are Vinr1 and Vinr2 exactly referring to in the context of the device block diagram?
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What happens if the differential signal exceeds the device's allowed range, especially when the input signal is more than 1000 mVpp (peak-to-peak)? Does this saturate the PGA or affect ADC accuracy?
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I have observed the following behavior:
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When using a PGA gain of 0.1 dB, I get random, high readings (e.g., 4000 LPH) at zero flow rate.
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Reducing the PGA gain to -2.3 dB corrects this behavior and gives a stable, near-zero reading.
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Could you please clarify:
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Whether Vinr1/Vinr2 are affected by the PGA gain setting?
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Does the PGA gain only affect the output of the amplifier, or does it also impose restrictions on the input signal levels?
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Is the erratic behavior caused due to exceeding the allowed input range of Vinr1/Vinr2 for the selected gain setting?
In other image it is mentioned that we can change the input Vpp by help of PG bias, but elsewhere it states that the input is restricted to 800 mVpp. Can this limitation be modified by adjusting the bias voltages?Then what is the importance of Vinr1 in that bais limit range?
