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MSP430G2121 no STE?

Other Parts Discussed in Thread: MSP430G2121, MSP430G2153, MSP430G2203, MSP430FG4618

The Msp430g2121 has SPI ... don't see an STE input ... needed to make the device an SPI slave.  Am I missing something?

  • The MSP430G2121 implements the USI module found in the MSP430x2xx Family User's Guide.  The USI can be configured in a mode to support SPI functionality.  The USI module only implements 3 signals, SCLK, SDO and SDI.  You are correct, there is no STE input.

  • Typically small parts by other companies are SPI slaves.  It seems strange that TI decided to make small parts SPI masters only ... slave is not an option. 

  • Hello 460822,

    If you need SPI slave you could use an MSP valueline device w/ USCI (not USI) that does contain SPI Master & Slave capability (for example the MSP430G2153 or the G2113).  The USCI peripheral is more full featured that the USI peripheral.  Additionlly some of the newer MSP430's now contain the eUSCI peripheral.  Summary is.. MSP430 devices may contain either USI, USCI, or eUSCI all of which have slightly different capabilties/features.

    Thanks, Merril

  • I was considering using the MSP430G2203 ... any pros / cons vs. your recommendations?

    Hmmmm.  I don't see the MSP430G2113 in the product family brochure slab034v.pdf.

    Are there any smaller parts? ... would prefer an 8 pin part ... need SPI slave plus two port 1 (or port 2) inputs.

  • 460822,

    I do not believe that an 8-pin device would meet your needs.  On an 8-pin package, 4 pins would be consumed by VCC,GND, RESET, and TEST.  Then, an additional 4 would be consumed by your 4-wire SPI implementation (SDO, SDI, SCLK, STE).  This would not leave 2 GPIO's.

    Based upon this, I concur with Merril that a generation 3 Value Line device (MSP430G2xx3) is what you will need to target for this application (contains USCI peripheral to support 4-wire SPI).  The smallest package size available will be a 20-pin package.  The MSP430G2203 will meet all of your needs (4-wire SPI, 2 GPIO inputs) except for package size (slightly larger).


  • Your right.  I forgot about reset and test. 

    Real estate is a challenge ... smaller the better.  It is unfortunate the 2121 does not have STE ... there are enough pins for it. 

    What about the other questions in the previous post?

  • 460822 said:
    Am I missing something?

    Yes. the meaning of STE.
    STE is not needed for slave operation. And it is not used as 'chip select' signal. STE is a helper signal that can be used to imemdiately 'shut up' the slave data output. However, it doesn't control anything else. You still need to detect and handle a chip select signal by software. On any GPIO pin you want. (and while you do, you can also deactivate the slave data output by software too). This is why STE is called STE and not CS. :)

    So it is just an additional convenience function for people whose code isn't fast enough to react on CS signal in time for shutting up the slave in a multi-slave environment.

    I agree that the role of STE could make use of some further clarification in the users guide. It's often misunderstood.

  • Thanks for the clear, concise explanation!!!

  • BTW: the MSP430FG4618 experimenters board has an additional F2013 on it. And IIRC, there is demo cod ewher ethe 4618 polls the 2013 through SPI, teh 2013 being the slave.

    The F2013 USI module is the same as on the G series devices - I think the chip is even binary-compatible except for a few details.

  • The F2013 is slightly more pricey than the G2121.  Although I'm interested in viewing the F2013 code you reference.

    I'm considering not using an external crystal with the G2121, just the internal clock.  Any issues of which I should be aware?