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MSP-TS430RGC64C: question on 1.8v external dvio power supply

Jason Kang
Intellectual 470 points
Other Parts Discussed in Thread: MSP-TS430RGC64C, MSP430F5229, MSP430F5237

Hi.

I have ordered and received MSP-TS430RGC64C & MSP-FET430UIF along with MSP430F5229 uC.

After installing CCS Version:5.5.0.00077, I connected MSP-TS430RGC64C to the USB port through MSP-FET430UIF. 

Then, I could see the famous “MSP430: Error connecting to the target: Unknown device” error.

According to several threads regarding this issue, the problem seems to be a hardware/connection issue.  

By the way, there was the following note which came with the product.

************************

Important: For correct JTAG connection, programming, and debug operation, it is important to follow this

procedure:

 1. Make sure that the VCC and DVIO voltage supplies are OFF and that the power rails are fully

discharged to 0 V.

2. Enable the 1.8-V external DVIO power supply.

3. Enable the 1.8-V to 3.6-V VCC power supply (alternatively, this supply can be provided from the MSPFET430UIF

JTAG debugger interface).

4. Connect the MSP-FET430UIF JTAG connector to the target board.

5. Start the debug session using IAR or CCS IDE.

 *********************************************

The user-guide also says that "This development platform does not supply the 1.8-V DVIO rail on board and it MUST be provided by external power supply for proper device operation".  

So, does "step 2" mean that “I need to provide 1.8V from an additional power supply through additional power cable”?

Thank you.  

  • 0
    TI__Expert 5465 points

    Jason,

    For the split-rail devices, you need to ensure that the DVIO rail is supplied before DVCC is supplied.

    You can either supply the DVIO pin on J6 (top right corner of board) prior to connecting the JTAG interface, or alternatively you can populate JP4 (just below J6) with a jumper to connect DVCC and DVIO together. This will allow you to operate the F5529, but the rails will both be at the same voltage.

    To achieve the split rail functionality, you must use an external power source to source the DVIO rail while DVCC is discharged, then you can connect the programming interface to the JTAG connector.

  • 0 in reply to Tyler Witt
    Intellectual 470 points

    Hi, Tyler. 

    Thank you for your feedback.

    I performed the first experiment.

    When DVCC & DVIO are tied together at JP4, I did not see the error message.

    That is good, and thank you for help.

    By the way, I have two questions.

    According to SLUA278P (page 85/153), DVIO is supposed to be 1.8V.

    When I tied DVIO to DVCC, it is ~3.3V.

    Question 1: So, does DVIO have a tolerance between 1.8V & 3.xV?

    Question 2: In your explanation, what is the benefit of "split rail functionality"? What disadvantage I will have if I simply tie DVIO and DVCC together?

    Thank you. 

  • 0 in reply to Jason Kang
    TI__Expert 5465 points

    Jason,

    To assess your questions:

    1) DVIO on the MSP430F5229 can be sourced by either a 1.8V or 3.3V supply. If you were to choose to power DVIO separately from DVCC, the Datasheet quotes the tolerance on this as being between 1.62V and 1.98V.

    2) The disadvantage to supplying DVIO and DVCC together is that it makes the split-rail not happen whatsoever. The design of this part is to allow the MSP430 to be able to communicate using both 3.3V logic and 1.8V logic. There are some parts that use a DVCC of only 1.8V and thus you cannot drive 3.3V on these lines.

  • 0 in reply to Tyler Witt
    Intellectual 470 points

    Thank you for your clear explanation.

    I have two more questions for you.

    1. By default, the development kit came with MSP430F5229. By the way, the part I am going to use is actually MSP430F5237. As shown on page 8/104 of "SLAS897-September 2013", there is no DVIO pin for this part (MSP430F5237). So, is DVIO a special feature for certain variants of the product family?   

    2. Can I assume that there is no disadvantage of tying DVIO & DVCC at 3.3V in terms of functionality / programming for my development? Please note that I will use MSP430F5237 anyway.  

    Thank you. 

  • 0 in reply to Jason Kang
    TI__Expert 5465 points

    You are correct on both fronts. At a bit more length:

    1) The DVIO/DVCC split-rail design is specialized for just a few derivatives of a few families (mostly so they can interface with 1.8V only parts as I mentioned previously).

    2) There should be no ill-effect from tying DVCC to DVIO for your purposes. Functionally, it will then act more similar to your end device of the MSP430F5237.

    ------EDIT--------

    Jason,

    I talked to another engineer in my group who has more experience with this part and apparently I have steered you wrong. The DVIO rail must be supplied by a 1.8V source. The same thought process behind this still holds, as the DVIO rail still must be ramped up prior to DVCC, the only change being that it must be sourced separately from DVCC.

    Also, another note on the F5237, this is just a newer spin of the F5227, with the DVCC and DVIO rails internally connected. So when you switch over to this part, the DVIO pin may be disregarded as an internal connection will override it anyway.

    Sorry for the confusion on this. Hope the clarification helps out

  • 0 in reply to Tyler Witt
    Intellectual 470 points

    It is very clear, now.

    Thank you so much for your help. 

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