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MSP430F67751 DCOCLK not as expected

Werner Ringelstein
Prodigy 10 points
Other Parts Discussed in Thread: MSP430F67751, MSP430F6638

I'm using THE MSP430F67751 Controller with XT1 Reference Clock of 32.768 kHz.

I can measure 32.767kHz at the ACLK Output.

The PLL-Ratio is 512 and should give me 16.777 MHz.

However the measured Frequency (SMCLK) of DCOCLK is 16.805 MHz. The Deviation makes some trouble in my timing sensitive algorthm. What explains this Deviation?

  • 0
    Intellectual 510 points

    Hi,

    I have had some problems wih DCO for very sensitive time measures.

    In my case i decided to use an external crystal to driver the timers. and i was able to get accurate timing.

  • 0 in reply to Edriano De Araujo
    Intellectual 510 points

    from the dt msp430f6638 its possible that DCO can drift 0.1% / C 

    Duty cycle Measured at SMCLK 40 50 60 %
    dfDCO/dT DCO frequency temperature drift fDCO = 1 MHz, 0.1 %/°C
    dfDCO/dVCC DCO frequency voltage drift fDCO = 1 MHz 1.9 %/V

  • 0
    Guru 227245 points

    First, it is an FLL, not a PLL.
    A PLL would indeed give you exact fREF*ratio. At the cost of a high current (and energy) consumption. This is why no PLL is used on MSPs.
    An FLL, however, compares the frequency to the reference and adjusts the frequency up or down. Where up or down means one DCO step.
    And the DCO has only 32 steps and (with modulation) 960 different frequencies in a range.

    Apparently, your 16.777MHz aren’t available and 16.805MHz are the closest. This may change with the mentioned temp/VCC drift.

    Also, the FLL may adjust it to 16.720 on next reference clock pulse. then back to 16.805 again etc.

    However, 0.17% aren’t that bad for a low-power R/C oscillator.

    If you need it better, use a crystal with the exact frequency.

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