I am using the MSP430F435.
I have examined the initial state of MCLK after PUC.
User Guide (SLAU056L) 5.2 FLL + Clock Module Operation (294 pages) is
There are the following description.
After a PUC, MCLK and SMCLK are sourced from DCOCLK at 32 times the
ACLK frequency. When a 32768-Hz crystal is used for ACLK, MCLK and
SMCLK stabilize to 1.048576 MHz.
I am using a crystal of 8MHz to XT1.
Even when using the high-frequency oscillator to XT1,
Do will perform the behavior described in the user guide?