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Calculating msp430 BSL Checksum

Jason Gramse
Intellectual 410 points
Other Parts Discussed in Thread: MSP430F5510, MSP430F5526

I'm having some difficulty calculating the correct checksum values for the BSL. I'm currently using the msp430f5526 (but will also be using the msp430f5510). The formula given in  slau319:

CKL = INV [ B1 XOR B3 XOR … XOR Bn–1 ]

CKH = INV [ B2 XOR B4 XOR … XOR Bn ]

gives me totally different values than the java script provided by ti.

Which one is most likely to produce the correct values so I can implement them in my own host application?

And what bytes of the BSL commands need to be included in the checksum in the bsl command data frame

HDR CMD L1 L2 AL AH LL LH D1 D2...Dn CKL CKH

According to the pdf 'Programming via the Bootstrap Loader it is: "calculated over all recieved or transmitted bytes B1 to Bn in the data frame,   ...   B1 is always the HDR byte and Bn is the last data byte"

According to the java script: for msp430f5xx devices "for the Flash based BSL this only includes the core command bytes "

Which of these recommendations do I use?

  • 0
    Intellectual 410 points
    Also, I was planning on loading new application code to flash using the TI-TEXT file generated by ccs v6.1.0. The TI-TEXT that was generated starts with : @4400 then has a whole bunch of hex bytes of data, then somewhere down the file it has another @ffd2 with about triple the amount of hex bytes as the first section. I was under the impression that the bsl could only right flash memory up to 0xfffe. If this is the case, how is it that the data from the second section extends well past this limit, and how do I handle this problem?
  • 0 in reply to Jason Gramse
    Guru 33653 points

    CRC is already included in USB, and it is not needed in USB BSL I guess that TI BSL have it because of compatibility with UART BSL. 0xfffe is not the limit, because there are devices with more than 64 KByte flash memory.

  • 0 in reply to zrno soli
    Intellectual 410 points

    Sorry I should have explained myself a little better. The boot loader is for an environmental sensor that communicates through UART. Once the sensor has been manufactured, the only access to the chip is through UART but we need to be able to update the code on the chip if/when the need arises. I've altered the source code for the BSL to accommodate this and to communicate at 1200 baud (the sensor uses SDI-12 protocol). Because of this, I'll need to add my own checksum correct? Also, seeing as 0xfffe is not the limit, am I allowed to send a three byte address with the BSL command RX_DATA_BLOCK?

  • 0
    Intellectual 410 points

    Okay I've got the CRC generation and the addressing figured out. Now the problem is the .map and .txt are showing that the bsl code is still being written to flash rather than the ZAREA. I've attached my lnk file and the ti generated text file. Can any one see why its still writing data to 0xffd2? Thanks in advance for taking the time to look this over.

    8524.MSP430F5526_BSL.txt 
    @1010
00 08 08 53 
@1042
81 00 00 3C B1 13 F8 07 0C 93 02 24 B1 13 22 06 
0C 43 B1 13 00 00 B1 13 04 08 32 D0 10 00 FD 3F 
00 00 04 01 00 00 D4 07 01 00 62 10 00 00 00 24 
00 00 
@ffd2
5C 10 5C 10 5C 10 5C 10 5C 10 5C 10 5C 10 5C 10 
5C 10 5C 10 5C 10 5C 10 5C 10 5C 10 5C 10 5C 10 
5C 10 5C 10 5C 10 5C 10 5C 10 5C 10 42 10 5A 14 
F1 03 0F 41 3F 80 00 1C 0E 4F CF 0E AF 00 FE 1B 
8F 43 00 00 FF 03 FE 03 DE 03 FA 23 82 43 0E 25 
B2 40 00 A5 10 25 00 18 F2 40 00 24 04 25 00 18 
F2 40 00 24 08 25 B2 40 33 02 68 01 82 43 60 01 
B2 40 40 00 62 01 82 43 6A 01 B2 40 3C 20 64 01 
5C 43 B1 13 20 04 3A 40 3B 00 39 40 3A 00 38 40 
05 00 37 40 07 00 8F 00 10 10 05 4F 0F 19 4F 10 
06 4F 78 3C B2 90 A5 A5 0E 25 34 20 0F 18 4D 5D 
00 18 4D DC 4D 13 0C 43 66 3C B1 13 02 02 CF 01 
B1 13 8E 06 2C 92 10 24 B1 13 12 02 CF 49 00 00 
B1 13 12 02 EF 41 01 00 B1 13 12 02 DF 41 01 00 
02 00 3C 40 03 00 54 3C B1 13 F4 01 EF 42 01 00 
4E 3C B2 90 A5 A5 0E 25 0D 20 3F 40 10 00 1F F2 
44 01 1F 52 10 25 3F 50 40 00 18 3C B2 90 A5 A5 
0E 25 02 24 2C 42 37 3C 92 42 10 25 44 01 2F 43 
1F 52 10 25 82 4F 40 01 0F 18 4D 5D 00 18 4D DC 
CD 43 00 00 3F 40 10 00 1F 52 10 25 82 4F 44 01 
BA 3F CC 0F B1 13 2A 07 4C 93 05 20 B1 13 F4 01 
CF 43 01 00 1C 3C B1 13 F4 01 CF 48 01 00 17 3C 
B1 13 F4 01 CF 47 01 00 12 3C 5F 43 52 3C 2E 42 
CC 05 CD 06 02 3C B1 13 02 02 B1 13 BC 04 0A 3C 
B1 13 AA 07 4C 4C B1 13 F4 01 CF 4C 01 00 2C 43 
B1 13 B2 05 B1 13 18 02 4C 4C 1C B3 FB 27 1F 43 
00 18 5F 52 04 25 2E 00 04 25 5C 4E 03 00 0D 43 
B1 13 88 07 2E 00 04 25 5E 4E 02 00 0C DE B1 13 
88 07 6E 4F 0C DE 2B 00 04 25 6E 4B 3E 80 10 00 
3E 90 0C 00 C5 2F 4E 0E 4E 05 80 18 50 4E B2 01 
E2 01 01 00 14 01 01 00 DE 00 01 00 C4 00 01 00 
32 01 01 00 52 01 01 00 8C 00 01 00 76 00 01 00 
48 01 01 00 40 01 01 00 32 01 01 00 3C 01 01 00 
4F 43 2E 42 00 18 5E 52 04 25 B1 13 3E 05 BA 3F 
03 43 B1 13 12 02 CF 4A 00 00 B1 13 12 02 10 01 
5E 4B 04 00 5F 4B 05 00 47 18 0F 5F 0E DF 10 01 
2F 00 08 25 10 01 F1 03 81 43 00 00 0C 43 0D 43 
20 3C F2 90 52 00 00 24 18 20 5C 42 01 24 0C 93 
0E 24 3C 92 0C 34 E2 B3 1D 06 FD 27 C2 43 0E 06 
D2 B3 0A 06 FD 23 4C 4C B1 13 20 04 06 3C E2 B3 
1D 06 FD 27 F2 40 56 00 0E 06 81 43 00 00 0C 43 
0D 43 D2 B3 1D 06 FD 27 5F 42 0C 06 0D 93 0A 20 
3F 90 80 00 44 24 E2 B3 1D 06 FD 27 F2 40 51 00 
0E 06 36 3C 1D 93 5C 24 2D 93 3E 24 CE 0D 1E 82 
0C 25 3E 90 03 00 35 24 2E 92 2C 20 4F 4F 8F 10 
81 DF 00 00 2D 41 B2 43 54 01 82 93 0C 25 09 24 
8E 00 00 24 0F 43 F2 4E 52 01 1F 53 1F 92 0C 25 
FA 2B 82 9D 54 01 0E 20 5F 42 00 24 3F F0 F0 FF 
3F 90 50 00 A6 27 E2 B3 1D 06 FD 27 C2 43 0E 06 
1C 43 33 3C E2 B3 1D 06 FD 27 F2 40 52 00 0E 06 
2C 43 2B 3C CE 0D 3E 80 03 00 CE 4F 00 24 1D 53 
22 3C 81 4F 00 00 FB 3F 4F 4F 8F 10 82 DF 0C 25 
82 93 0C 25 07 20 E2 B3 1D 06 FD 27 F2 40 53 00 
0E 06 2C 43 B2 90 05 01 0C 25 07 28 E2 B3 1D 06 
FD 27 F2 40 54 00 0E 06 2C 43 3D 40 03 00 03 3C 
82 4F 0C 25 2D 43 0C 93 8C 27 E1 03 10 01 6A 14 
CB 0C 1F 42 0C 25 2F 82 C8 0F 09 43 08 5B 09 6D 
C7 0B C6 0D CA 07 CC 06 0A 5F 0C 63 06 9C 05 28 
02 20 07 9A 02 28 0C 43 50 3C 1A 43 0A FB 0A 93 
26 20 C5 07 CC 06 05 8F 0C 73 05 8B 0C 7D 3C 93 
02 20 35 93 1C 24 2C 4E B2 90 A5 A5 0E 25 12 20 
C5 06 0F 18 45 55 00 18 45 D7 85 4C 00 00 C5 06 
0F 18 45 55 00 18 45 D7 2C 95 02 20 0C 43 03 3C 
1C 43 01 3C 2C 42 EE 03 17 53 06 63 1D 3C 64 4E 
45 44 B2 90 A5 A5 0E 25 14 20 CC 06 0F 18 4C 5C 
00 18 4C D7 CC 44 00 00 CC 06 0F 18 4C 5C 00 18 
4C D7 6C 4C 4C 4C 05 9C 02 20 0C 43 03 3C 1C 43 
01 3C 2C 42 AE 00 01 00 0C 93 07 20 17 53 06 63 
06 99 B5 2B 02 20 07 98 B2 2B 64 16 10 01 D2 D3 
00 06 F2 D0 C0 00 01 06 F2 D0 80 00 00 06 4C 4C 
1C 83 3C 90 07 00 3E 2C 4C 0E 4C 05 80 18 50 4C 
44 04 AA 04 01 00 A2 04 01 00 96 04 01 00 88 04 
01 00 7A 04 01 00 6C 04 01 00 60 04 01 00 B2 40 
45 00 06 06 F2 42 08 06 25 3C B2 40 8A 00 06 06 
F2 40 0E 00 08 06 1E 3C B2 40 D0 00 06 06 F2 40 
06 00 08 06 17 3C B2 40 A0 01 06 06 F2 40 0C 00 
08 06 10 3C B2 40 41 03 06 06 E2 42 08 06 0A 3C 
B2 40 82 06 06 06 03 3C B2 40 0A 1A 06 06 F2 40 
0A 00 08 06 D2 C3 00 06 10 01 3A 14 C8 0C 09 43 
C7 0E 07 58 09 6D 0B 43 2D 3C CF 07 CE 09 0F 88 
0E 7D 05 20 3F 90 04 01 02 2C CA 0F 02 3C 3A 40 
03 01 1F 43 00 18 5F 52 08 25 CC 08 CE 0A B1 13 
E2 06 4B 4C 0B 93 08 20 2F 00 08 25 FF 40 3A 00 
00 00 1C 43 0C 5A 0A 3C 2F 00 08 25 FF 40 3B 00 
00 00 2F 00 08 25 CF 4B 01 00 2C 43 B1 13 B2 05 
08 5A 0D 63 0F 43 0D 99 04 28 02 20 08 97 01 28 
1F 43 0F DB 0F 93 C9 27 37 16 10 01 1A 14 CA 0F 
B2 90 A5 A5 0E 25 02 24 2F 42 0A 3C 92 42 10 25 
44 01 3F 40 40 00 1F 52 10 25 82 4F 40 01 0F 43 
0B 43 B2 90 05 00 0C 25 01 28 1B 43 09 43 0F 93 
01 20 19 43 09 BB 03 24 B1 13 50 03 4F 4C 4A 93 
0C 20 2E 00 08 25 FE 40 3B 00 00 00 2E 00 08 25 
CE 4F 01 00 2C 43 B1 13 B2 05 92 42 10 25 40 01 
3F 40 10 00 1F 52 10 25 82 4F 44 01 19 16 10 01 
E2 B3 1D 06 FD 27 F2 40 80 00 0E 06 E2 B3 1D 06 
FD 27 C2 4C 0E 06 CF 0C 8F 10 8F 11 4F 4F E2 B3 
1D 06 FD 27 C2 4F 0E 06 B2 43 54 01 1C 93 0F 38 
8E 00 00 24 6F 4E C2 4F 52 01 4F 4F E2 B3 1D 06 
FD 27 C2 4F 0E 06 AE 00 01 00 1C 83 F3 23 1F 42 
54 01 4E 4F E2 B3 1D 06 FD 27 C2 4E 0E 06 8F 10 
8F 11 4F 4F E2 B3 1D 06 FD 27 C2 4F 0E 06 10 01 
2A 14 40 18 1A 42 5C 01 40 18 B2 40 80 5A 5C 01 
8F 00 68 10 9F 00 6C 10 13 24 89 00 6C 10 88 00 
74 10 0C 3C 0C 09 7F 4C 5F 06 00 18 5F 4F 68 10 
A9 00 04 00 0D 09 4F 13 A9 00 04 00 D9 08 F2 23 
7A C2 3A D0 08 5A 40 18 82 4A 5C 01 8F 00 00 00 
9F 00 00 00 09 24 8A 00 00 00 03 3C 6A 13 AA 00 
04 00 9A 00 00 00 FA 23 28 16 10 01 2A 14 B2 43 
54 01 0B 43 CA 0E 0A 5C 0B 6D C8 0C C9 0D 08 5E 
09 63 0D 99 03 28 16 20 0C 98 14 2C B2 90 A5 A5 
0E 25 02 24 2C 42 12 3C CE 0D 0F 18 4E 5E 00 18 
4E DC E2 4E 52 01 1C 53 0D 63 0D 9B EF 2B 02 20 
0C 9A EC 2B 9F 42 54 01 00 00 0C 43 28 16 10 01 
1A 14 CB 0C 0B 5E CA 0D 0A 63 1B 83 0A 73 14 3C 
B2 90 A5 A5 0E 25 02 24 6C 42 14 3C CE 0B 0E 8C 
4E 0E 4E 0D EE 0F C9 0A 0F 18 49 59 00 18 49 DB 
EE 49 00 00 1B 83 0A 73 0A 9D 03 28 E9 23 0B 9C 
E7 2F 4C 43 19 16 10 01 F1 03 3D 40 20 00 0E 43 
3B 40 E0 FF 7F 4C 7F EB 0E DF 1D 83 FB 23 0E 93 
05 24 B1 13 AA 07 7C 40 05 00 0D 3C B1 40 FF 7F 
00 00 02 3C 91 83 00 00 91 93 00 00 FB 37 B2 40 
A5 A5 0E 25 4C 43 E1 03 10 01 5C 02 0D 6D 5C 02 
0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 
0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 
0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 0D 6D 5C 02 
0D 6D 5C 02 0D 6D 10 01 92 42 10 25 44 01 3F 40 
06 00 1F 52 10 25 82 4F 40 01 3F 40 E0 FF CF 43 
00 00 3F 40 10 00 1F 52 10 25 82 4F 44 01 4C 43 
10 01 1F 4C 01 00 1E 4C 03 00 0E 93 02 20 0F 93 
09 24 AD 00 01 00 CD 43 FF FF 1F 83 0E 73 F9 23 
0F 93 F7 23 10 01 B2 40 80 5A 5C 01 32 C2 03 43 
10 01 03 43 FF 3F 
q

    lnk_msp430f5526_bsl.cmd.txt 
    /* ============================================================================ */
/* Copyright (c) 2015, Texas Instruments Incorporated                           */
/*  All rights reserved.                                                        */
/*                                                                              */
/*  Redistribution and use in source and binary forms, with or without          */
/*  modification, are permitted provided that the following conditions          */
/*  are met:                                                                    */
/*                                                                              */
/*  *  Redistributions of source code must retain the above copyright           */
/*     notice, this list of conditions and the following disclaimer.            */
/*                                                                              */
/*  *  Redistributions in binary form must reproduce the above copyright        */
/*     notice, this list of conditions and the following disclaimer in the      */
/*     documentation and/or other materials provided with the distribution.     */
/*                                                                              */
/*  *  Neither the name of Texas Instruments Incorporated nor the names of      */
/*     its contributors may be used to endorse or promote products derived      */
/*     from this software without specific prior written permission.            */
/*                                                                              */
/*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/*  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,       */
/*  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR      */
/*  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR            */
/*  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,       */
/*  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,         */
/*  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/*  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,    */
/*  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR     */
/*  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,              */
/*  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                          */
/* ============================================================================ */

/******************************************************************************/
/* lnk_msp430f5526.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5526 PROGRAMS     */
/*                                                                            */
/*   Usage:  lnk430 <obj files...>    -o <out file> -m <map file> lnk.cmd     */
/*           cl430  <src files...> -z -o <out file> -m <map file> lnk.cmd     */
/*                                                                            */
/*----------------------------------------------------------------------------*/
/* These linker options are for command line linking only.  For IDE linking,  */
/* you should set your linker options in Project Properties                   */
/* -c                                               LINK USING C CONVENTIONS  */
/* -stack  0x0100                                   SOFTWARE STACK SIZE       */
/* -heap   0x0100                                   HEAP AREA SIZE            */
/*                                                                            */
/*----------------------------------------------------------------------------*/
/* Version: 1.167                                                             */
/*----------------------------------------------------------------------------*/

/****************************************************************************/
/* Specify the system memory map                                            */
/****************************************************************************/

MEMORY
{
    SFR                     : origin = 0x0000, length = 0x0010
    PERIPHERALS_8BIT        : origin = 0x0010, length = 0x00F0
    PERIPHERALS_16BIT       : origin = 0x0100, length = 0x0100
    RAM                     : origin = 0x2400, length = 0x1800
    USBRAM                  : origin = 0x1C00, length = 0x0800
    INFOA                   : origin = 0x1980, length = 0x0080
    INFOB                   : origin = 0x1900, length = 0x0080
    INFOC                   : origin = 0x1880, length = 0x0080
    INFOD                   : origin = 0x1800, length = 0x0080
    ZAREA                   : origin = 0x1000, length = 0x0010
    BSL430_VERSION_VENDOR   : origin = 0x1010, length = 0x0001
    BSL430_VERSION_CI       : origin = 0x1011, length = 0x0001
    BSL430_VERSION_API      : origin = 0x1012, length = 0x0001
    BSL430_VERSION_PI       : origin = 0x1013, length = 0x0001
    ZAREA_CODE              : origin = 0x1014, length = 0x002E
    FLASH                   : origin = 0x1042, length = 0x07AE
    BSLSIG                  : origin = 0x17F0, length = 0x000C
    JTAGLOCK_KEY            : origin = 0x17FC, length = 0x0004
    FLASH2                  : origin = 0x10000,length = 0xC400
    INT00                   : origin = 0xFF80, length = 0x0002
    INT01                   : origin = 0xFF82, length = 0x0002
    INT02                   : origin = 0xFF84, length = 0x0002
    INT03                   : origin = 0xFF86, length = 0x0002
    INT04                   : origin = 0xFF88, length = 0x0002
    INT05                   : origin = 0xFF8A, length = 0x0002
    INT06                   : origin = 0xFF8C, length = 0x0002
    INT07                   : origin = 0xFF8E, length = 0x0002
    INT08                   : origin = 0xFF90, length = 0x0002
    INT09                   : origin = 0xFF92, length = 0x0002
    INT10                   : origin = 0xFF94, length = 0x0002
    INT11                   : origin = 0xFF96, length = 0x0002
    INT12                   : origin = 0xFF98, length = 0x0002
    INT13                   : origin = 0xFF9A, length = 0x0002
    INT14                   : origin = 0xFF9C, length = 0x0002
    INT15                   : origin = 0xFF9E, length = 0x0002
    INT16                   : origin = 0xFFA0, length = 0x0002
    INT17                   : origin = 0xFFA2, length = 0x0002
    INT18                   : origin = 0xFFA4, length = 0x0002
    INT19                   : origin = 0xFFA6, length = 0x0002
    INT20                   : origin = 0xFFA8, length = 0x0002
    INT21                   : origin = 0xFFAA, length = 0x0002
    INT22                   : origin = 0xFFAC, length = 0x0002
    INT23                   : origin = 0xFFAE, length = 0x0002
    INT24                   : origin = 0xFFB0, length = 0x0002
    INT25                   : origin = 0xFFB2, length = 0x0002
    INT26                   : origin = 0xFFB4, length = 0x0002
    INT27                   : origin = 0xFFB6, length = 0x0002
    INT28                   : origin = 0xFFB8, length = 0x0002
    INT29                   : origin = 0xFFBA, length = 0x0002
    INT30                   : origin = 0xFFBC, length = 0x0002
    INT31                   : origin = 0xFFBE, length = 0x0002
    INT32                   : origin = 0xFFC0, length = 0x0002
    INT33                   : origin = 0xFFC2, length = 0x0002
    INT34                   : origin = 0xFFC4, length = 0x0002
    INT35                   : origin = 0xFFC6, length = 0x0002
    INT36                   : origin = 0xFFC8, length = 0x0002
    INT37                   : origin = 0xFFCA, length = 0x0002
    INT38                   : origin = 0xFFCC, length = 0x0002
    INT39                   : origin = 0xFFCE, length = 0x0002
    INT40                   : origin = 0xFFD0, length = 0x0002
    INT41                   : origin = 0xFFD2, length = 0x0002
    INT42                   : origin = 0xFFD4, length = 0x0002
    INT43                   : origin = 0xFFD6, length = 0x0002
    INT44                   : origin = 0xFFD8, length = 0x0002
    INT45                   : origin = 0xFFDA, length = 0x0002
    INT46                   : origin = 0xFFDC, length = 0x0002
    INT47                   : origin = 0xFFDE, length = 0x0002
    INT48                   : origin = 0xFFE0, length = 0x0002
    INT49                   : origin = 0xFFE2, length = 0x0002
    INT50                   : origin = 0xFFE4, length = 0x0002
    INT51                   : origin = 0xFFE6, length = 0x0002
    INT52                   : origin = 0xFFE8, length = 0x0002
    INT53                   : origin = 0xFFEA, length = 0x0002
    INT54                   : origin = 0xFFEC, length = 0x0002
    INT55                   : origin = 0xFFEE, length = 0x0002
    INT56                   : origin = 0xFFF0, length = 0x0002
    INT57                   : origin = 0xFFF2, length = 0x0002
    INT58                   : origin = 0xFFF4, length = 0x0002
    INT59                   : origin = 0xFFF6, length = 0x0002
    INT60                   : origin = 0xFFF8, length = 0x0002
    INT61                   : origin = 0xFFFA, length = 0x0002
    INT62                   : origin = 0xFFFC, length = 0x0002
    RESET                   : origin = 0xFFFE, length = 0x0002
}

/****************************************************************************/
/* Specify the sections allocation into memory                              */
/****************************************************************************/

SECTIONS
{
    .bss        : {} > RAM                  /* Global & static vars              */
    .data       : {} > RAM                  /* Global & static vars              */
    .TI.noinit  : {} > RAM                  /* For #pragma noinit                */
    .sysmem     : {} > RAM                  /* Dynamic memory allocation area    */
    .stack      : {} > RAM (HIGH)           /* Software system stack             */

    .ZAREA      : {} > ZAREA
    .BSL430_VERSION_VENDOR : {} > BSL430_VERSION_VENDOR
    .BSL430_VERSION_CI     : {} > BSL430_VERSION_CI
    .BSL430_VERSION_API    : {} > BSL430_VERSION_API
    .BSL430_VERSION_PI     : {} > BSL430_VERSION_PI
    .ZAREA_CODE : {} > ZAREA_CODE
    .BSLSIG     : {} > BSLSIG
    .JTAGLOCK_KEY : {} > JTAGLOCK_KEY

#ifndef __LARGE_DATA_MODEL__
    .text       : {}>> FLASH                /* Code                              */
#else
    .text       : {}>> FLASH2 | FLASH       /* Code                              */
#endif
    .text:_isr  : {} > FLASH                /* ISR Code space                    */
    .cinit      : {} > FLASH                /* Initialization tables             */
#ifndef __LARGE_DATA_MODEL__
    .const      : {} > FLASH                /* Constant data                     */
#else
    .const      : {} > FLASH | FLASH2       /* Constant data                     */
#endif
    .cio        : {} > RAM                  /* C I/O Buffer                      */

    .pinit      : {} > FLASH                /* C++ Constructor tables            */
    .init_array : {} > FLASH                /* C++ Constructor tables            */
    .mspabi.exidx : {} > FLASH              /* C++ Constructor tables            */
    .mspabi.extab : {} > FLASH              /* C++ Constructor tables            */

    .infoA     : {} > INFOA              /* MSP430 INFO FLASH Memory segments */
    .infoB     : {} > INFOB
    .infoC     : {} > INFOC
    .infoD     : {} > INFOD

    /* MSP430 Interrupt vectors          */
    .int00       : {}               > INT00
    .int01       : {}               > INT01
    .int02       : {}               > INT02
    .int03       : {}               > INT03
    .int04       : {}               > INT04
    .int05       : {}               > INT05
    .int06       : {}               > INT06
    .int07       : {}               > INT07
    .int08       : {}               > INT08
    .int09       : {}               > INT09
    .int10       : {}               > INT10
    .int11       : {}               > INT11
    .int12       : {}               > INT12
    .int13       : {}               > INT13
    .int14       : {}               > INT14
    .int15       : {}               > INT15
    .int16       : {}               > INT16
    .int17       : {}               > INT17
    .int18       : {}               > INT18
    .int19       : {}               > INT19
    .int20       : {}               > INT20
    .int21       : {}               > INT21
    .int22       : {}               > INT22
    .int23       : {}               > INT23
    .int24       : {}               > INT24
    .int25       : {}               > INT25
    .int26       : {}               > INT26
    .int27       : {}               > INT27
    .int28       : {}               > INT28
    .int29       : {}               > INT29
    .int30       : {}               > INT30
    .int31       : {}               > INT31
    .int32       : {}               > INT32
    .int33       : {}               > INT33
    .int34       : {}               > INT34
    .int35       : {}               > INT35
    .int36       : {}               > INT36
    .int37       : {}               > INT37
    .int38       : {}               > INT38
    .int39       : {}               > INT39
    .int40       : {}               > INT40
    RTC          : { * ( .int41 ) } > INT41 type = VECT_INIT
    PORT2        : { * ( .int42 ) } > INT42 type = VECT_INIT
    TIMER2_A1    : { * ( .int43 ) } > INT43 type = VECT_INIT
    TIMER2_A0    : { * ( .int44 ) } > INT44 type = VECT_INIT
    USCI_B1      : { * ( .int45 ) } > INT45 type = VECT_INIT
    USCI_A1      : { * ( .int46 ) } > INT46 type = VECT_INIT
    PORT1        : { * ( .int47 ) } > INT47 type = VECT_INIT
    TIMER1_A1    : { * ( .int48 ) } > INT48 type = VECT_INIT
    TIMER1_A0    : { * ( .int49 ) } > INT49 type = VECT_INIT
    DMA          : { * ( .int50 ) } > INT50 type = VECT_INIT
    USB_UBM      : { * ( .int51 ) } > INT51 type = VECT_INIT
    TIMER0_A1    : { * ( .int52 ) } > INT52 type = VECT_INIT
    TIMER0_A0    : { * ( .int53 ) } > INT53 type = VECT_INIT
    ADC12        : { * ( .int54 ) } > INT54 type = VECT_INIT
    USCI_B0      : { * ( .int55 ) } > INT55 type = VECT_INIT
    USCI_A0      : { * ( .int56 ) } > INT56 type = VECT_INIT
    WDT          : { * ( .int57 ) } > INT57 type = VECT_INIT
    TIMER0_B1    : { * ( .int58 ) } > INT58 type = VECT_INIT
    TIMER0_B0    : { * ( .int59 ) } > INT59 type = VECT_INIT
    COMP_B       : { * ( .int60 ) } > INT60 type = VECT_INIT
    UNMI         : { * ( .int61 ) } > INT61 type = VECT_INIT
    SYSNMI       : { * ( .int62 ) } > INT62 type = VECT_INIT
    .reset       : {}               > RESET  /* MSP430 Reset vector         */
}

/****************************************************************************/
/* Include peripherals memory map                                           */
/****************************************************************************/

-l msp430f5526.cmd

  • 0 in reply to Jason Gramse
    Intellectual 410 points

    It was a compiler option. Had to enable read/write/erase access to BSL memory (Project Properites --> Debug --> MSP430 Properties --> Download Options) and also specify small data memory and small  code memory model (Project Properties --> CCS Build --> MSP430 Compiler --> Processor Options)

  • 0 in reply to Jason Gramse
    Intellectual 410 points
    One more question. From SLAA450C,

    "For production, it is required to have one valid firmware image to flash to the device.
    A simple way to do so is using the text version of the code in the TI-TXT and copy and paste the BSL TITXT
    content into the user application.
    Adding user code to the BSL project. This method gives the advantage of being able to debug BSL and
    user code interaction."

    The TI-TXT version of my code and the BSL TI-TXT content both have bytes addressed from 0xFFD2 - 0x10000. (INT41 - INT62 and RESET vectors). Do I need to worry about preserving the content of these memory areas? Do I give priority to application or BSL TI-TEXT files?
  • 0
    Guru 12050 points

    here is how I do it in C#

                int temp1 = TXbuffer[0];
            int temp2 = TXbuffer[1];
            for (int k = 2; k < TXbuffer.Length-2 ; k += 2)                         // bytes to encode for checksum 
            {               
                temp1 ^= TXbuffer[k];
                temp2 ^= TXbuffer[k+1];
            }
            TXbuffer[TXbuffer.Length-2]= (byte)~temp1;                              // fill in the checksum low
            TXbuffer[TXbuffer.Length-1]= (byte)~temp2;                              // fill in the checksum high

  • 0
    Intellectual 410 points

    Here's how I ended up doing it in python... if anyone is interested.

        def append_check_sum(self, cmd_int_list):
        crc = 0xffff
        i = 0
        # exclude the header and length of data bytes from checksum
        for byte in cmd_int_list[3:]:
            x = ((crc>>8) ^ byte) & 0xff;
            x ^= x>>4;
            crc = (crc << 8) ^ (x << 12) ^ (x << 5) ^ x
        cmd_int_list.append(int(crc & 0xff))
        cmd_int_list.append(int((crc >> 8) & 0xff))

  • 0 in reply to Jason Gramse
    Intellectual 935 points
    Jason,
    How can you get the CRC checksum (CKL and CKH) because i have the same problem. I want to transmit the BSL frame but i get 0x52 (incorrect checksum)
  • 0 in reply to Ahmed Kamel
    Intellectual 410 points

    If you look at previous post with my python code:

    cmd_int_list.append(int(crc & 0xff))      <------ The value being appended int(crc & 0xff) is CKL

    cmd_int_list.append(int((crc>> 8) & 0xff)) <------- The value being appended int((crc>> 8) & 0xff)) is CKH

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