Hello,
I am new to MSP430FR5857.
I am trying to setup the MCLK as a processor clk which will need to use our external crystal at 8Mhz.
To confirm correct configuration I am also trying to toggle the P4.4 output at the rate of the system MCLK.
However, the P4.4 toggles at only 500khz rate.
If somebody could inspect my code below and let me know if there is anything I missed I would truly appreciated.
Note: I am also seeing 8.3MHz on my SMCLK pin but with variable duty cycle. Is this behavior of SMCLK expected?
/* Includes ------------------------------------------------------------------*/
#include <msp430.h>
int main(void) {
WDTCTL = WDTPW | WDTHOLD;
// Configure GPIO
P4OUT = 0;
P4DIR = BIT4; // For P4.4 test output
P4OUT = 0;
P4DIR = BIT4; // For P4.4 test output
P3DIR |= BIT4;
P3SEL0 |= BIT4; // Output SMCLK as a test
P3SEL1 |= BIT4;
P3SEL0 |= BIT4; // Output SMCLK as a test
P3SEL1 |= BIT4;
PJSEL0 |= BIT6; // For XT1 // set PJ.6 for HFXIN and PJ7 for HFXOUT
// Disable the GPIO power-on default high-impedance mode to activate
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;
CSCTL0_H = CSKEY >> 8; // Unlock CS registers
//CSCTL1 = DCOFSEL_6; // Set DCO to 8MHz
CSCTL2 = SELS__HFXTCLK | SELM__HFXTCLK; // Set SMCLK and MCLK to 8Mhz Crystal
CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1; // Set all dividers to 1
CSCTL4 |= HFXTDRIVE_3;
CSCTL4 &= ~(HFXTOFF);
do
{
CSCTL5 &= ~(HFXTOFFG); // Clear XT1 fault flag
SFRIFG1 &= ~OFIFG;
}while (SFRIFG1&OFIFG); // Test oscillator fault flag
CSCTL0_H = 0; // Lock CS registers
//CSCTL1 = DCOFSEL_6; // Set DCO to 8MHz
CSCTL2 = SELS__HFXTCLK | SELM__HFXTCLK; // Set SMCLK and MCLK to 8Mhz Crystal
CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1; // Set all dividers to 1
CSCTL4 |= HFXTDRIVE_3;
CSCTL4 &= ~(HFXTOFF);
do
{
CSCTL5 &= ~(HFXTOFFG); // Clear XT1 fault flag
SFRIFG1 &= ~OFIFG;
}while (SFRIFG1&OFIFG); // Test oscillator fault flag
CSCTL0_H = 0; // Lock CS registers
while (1) {
P4OUT ^= BIT4; // Toggle LED P4.4 at the rate of MCLK (8Mhz minus the instruction cycles) Note: Here I see only 500Khz toggle, I expected around 4Mhz or faster.
//__delay_cycles(8000000); // Wait 8,000,000 CPU Cycles
}
P4OUT ^= BIT4; // Toggle LED P4.4 at the rate of MCLK (8Mhz minus the instruction cycles) Note: Here I see only 500Khz toggle, I expected around 4Mhz or faster.
//__delay_cycles(8000000); // Wait 8,000,000 CPU Cycles
}
}
Regards,
Admir M.
