error while using external clock for MSP430F1610

Hi Clemens,

I am new to programming on msp430. I expect the MCLK to take the clock input from XT2IN. The external clock is supplied with the help of a frequency generator. I expect a value of 5 on P1 output pins. Also, the value should toggle from 0 to 5 as shown inside the for loop. However, the value does not toggle. I tried the same with the OFIFG code not commented. However, things don't seem to work out. 

This code does not even try to take MCLK from XT2.
Replace the magic numbers for the CTL registers with proper symbols.

An oscillator fault typcially happens when changing the clock configuration. So you must clear the OFIFG flag, otherwise MCLK stays in the error state (sourced from the DCO).

Hi Clemens,

Thank you very much for your help. Here goes my new code :

#include <stdio.h>
#include "msp430f1610.h"
#include "msp430.h"

int do_mult(int a, int b){return a*b;}

void main(void) {

WDTCTL = WDTPW + WDTHOLD;

BCSCTL1 = ~XT2OFF & ~XTS & ~XT5V;
BCSCTL2 = SELM0 | SELM1;

volatile int i;

do {
IFG1 &= ~OFIFG;
for (i = 0xff; i>0; i--);
} while((IFG1&OFIFG));

P1DIR = 0xff;
int c = do_mult(1,5);

for (;;){
P1OUT = P1OUT ^ c;
for(i = 0; i<32000; i++){};
}

}

I have also cleared the OFIFG flag. But, the MCLK still appears to be sourced from the DCO. Please help me out.

If you want to clear different bits with one instruction, write

BCSCTL1 &= ~(XT2OFF | XTS | XT5V);

My msp430f1610.h says:

#define SELM0               (0x40)   /* MCLK Source Select 0 */
#define SELM1               (0x80)   /* MCLK Source Select 1 */
...
#define SELM_0              (0x00)   /* MCLK Source Select 0: DCOCLK */
#define SELM_1              (0x40)   /* MCLK Source Select 1: DCOCLK */
#define SELM_2              (0x80)   /* MCLK Source Select 2: XT2CLK/LFXTCLK */
#define SELM_3              (0xC0)   /* MCLK Source Select 3: LFXTCLK */

SELM0 | SELM1 is 0xC0.