Hello,
I'm trying to pull out of reset the CC110L with MSP430G2302, it has 3 wire spi in the USI.
I've took from the examples the configurations & trying to work without interrupt.
The documentation is quite poor so one can only guess that "P1.7 USI: Data input in SPI mode" is input of the host (my assumption) as mentioned in the documentation
1. Could someone kindly verify the out of reset sequence? if it is valid what could keep the CC in reset?
2. Could someone kindly verify my legs assignment?
////port assingments: #define __mrfi_SPI_CSN_GPIO_BIT__ 4 #define MRFI_SPI_CONFIG_CSN_PIN_AS_OUTPUT() st( P1DIR |= BV(__mrfi_SPI_CSN_GPIO_BIT__); ) #define MRFI_SPI_DRIVE_CSN_HIGH() st( P1OUT |= BV(__mrfi_SPI_CSN_GPIO_BIT__); ) /* atomic operation */ #define MRFI_SPI_DRIVE_CSN_LOW() st( P1OUT &= ~BV(__mrfi_SPI_CSN_GPIO_BIT__); ) /* atomic operation */ #define MRFI_SPI_CSN_IS_HIGH() ( P1OUT & BV(__mrfi_SPI_CSN_GPIO_BIT__) ) /* SCLK Pin Configuration */ #define __mrfi_SPI_SCLK_GPIO_BIT__ 5 #define MRFI_SPI_CONFIG_SCLK_PIN_AS_OUTPUT() st( P1DIR |= BV(__mrfi_SPI_SCLK_GPIO_BIT__); ) #define MRFI_SPI_DRIVE_SCLK_HIGH() st( P1OUT |= BV(__mrfi_SPI_SCLK_GPIO_BIT__); ) #define MRFI_SPI_DRIVE_SCLK_LOW() st( P1OUT &= ~BV(__mrfi_SPI_SCLK_GPIO_BIT__); ) /* SI Pin Configuration */ #define __mrfi_SPI_SI_GPIO_BIT__ 7 #define MRFI_SPI_CONFIG_SI_PIN_AS_OUTPUT() st( P1DIR |= BV(__mrfi_SPI_SI_GPIO_BIT__); ) #define MRFI_SPI_DRIVE_SI_HIGH() st( P1OUT |= BV(__mrfi_SPI_SI_GPIO_BIT__); ) #define MRFI_SPI_DRIVE_SI_LOW() st( P1OUT &= ~BV(__mrfi_SPI_SI_GPIO_BIT__); ) /* SO Pin Configuration maybe switch with 7 - both didn't work?*/ #define __mrfi_SPI_SO_GPIO_BIT__ 6 #define MRFI_SPI_CONFIG_SO_PIN_AS_INPUT() st( P1DIR &= ~BV(__mrfi_SPI_SO_GPIO_BIT__);) #define MRFI_SPI_SO_IS_HIGH() ( P1IN & BV(__mrfi_SPI_SO_GPIO_BIT__) )
The init sequence:
P1OUT = BIT4; // P1.4 set, else reset
P1REN |= 0x10; // P1.4 pullup
P1DIR = BIT0 | BIT4| BIT5 | BIT6| BIT7; // P1.0 output, else input
USICTL0 |= USIPE7 | USIPE6 | USIPE5 | USIMST | USIOE; // Port, SPI master
// USICTL1 |= USICKPH; // Counter interrupt, flag remains set
USICTL1 =0;
USICKCTL = USIDIV_4 + USISSEL_2; // /16 SMCLK
USICTL0 &= ~USISWRST; // USI released for operation
USISRL = P1IN; // init-load data
P1DIR |= 0x04; // Reset Slave
P1DIR &= ~0x04;
int tmpI = 0;
for (tmpI = 0xFFF; tmpI > 0; tmpI--); // Time for slave to ready
USICNT = 8; // init-load counter
////////////////////
/* pulse CSn low then high */
MRFI_SPI_DRIVE_CSN_LOW();
Mrfi_DelayUsec(10);
MRFI_SPI_DRIVE_CSN_HIGH();
/* hold CSn high for at least 40 microseconds */
Mrfi_DelayUsec(40);
/* pull CSn low and wait for SO to go low */
MRFI_SPI_DRIVE_CSN_LOW();
while (MRFI_SPI_SO_IS_HIGH());
/* directly send strobe command - cannot use function as it affects CSn pin */
MRFI_SPI_WRITE_BYTE(SRES);
MRFI_SPI_WAIT_DONE();
/* wait for SO to go low again, reset is complete at that point */
while (MRFI_SPI_SO_IS_HIGH());
/* return CSn pin to its default high level */
MRFI_SPI_DRIVE_CSN_HIGH();
/* ------------------------------------------------------------------
* Run-time integrity checks
* ---------------------------
*/
/* verify the correct radio is installed */
uint8_t tmpVersion = mrfiSpiReadReg( PARTVERSION ) ; // GETTING 0xFF here
MRFI_ASSERT( tmpVersion >= MRFI_RADIO_MIN_VERSION ); /* obsolete radio specified */
