I received the next information from TIJ FAE.
=============
For the USCI30
>>If there is any sample-code for this errata, could you share it, please? If this simple workaround of USCI30 is
>>that “(a) servicing the interrupt and ensuring UCBxRXBUF is read promptly”, probably, there may be not any sample-code.
>>
Correct and the MSP430F2252 does not come with a DMA so that will be the only option. But in the case that the receive buffer
cannot be read out in time, you could do this:
Q1: Can this work around also fit reception of a slave mode?
Q2: If we were using the I2C clock stretch, whether this UCI30 does not occur?
_ _ _
SCL:~|_|~|_|~|_|~|_|~|_|~|_|~
^ next data
SCL:~|_|~|_|~|_|~|________|~|_|~|_|~
^^^^^^^^ -> clock stretch
Regards