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Chip selection: Have MSP430F2419, but need a variable data length SPI controller

Other Parts Discussed in Thread: MSP430F2419, MSP430G2452, MSP430F2013

Hello All,

I have an existing design that uses the MSP430F2419.  This chip has two USCI modules.  These will accommodate 7 or 8 bit data words.  I need to support a SPI device that uses variable data-bit lengths.  So I need a chip with a USI module.  I'd like to find a mostly pin-compatible part that offers a USI module.  It would be OK to drop down from two USCI modules, to one USCI and one USI modules.

Can you offer part number suggestions?

Thanks

  • Did you try parametric search?

  • Hmm, the new parametric search page appears to only list the number of SPI modules, not their type. I'm not sure if I've remembered correctly, but I thought the old page did specify whether the MCU had USCI, USI or USART.
  • I doubt you will find a replacement for such a large processor like the MSP430F2419 that has an USI module. The smaller ones like the MSP430G2452 or the MSP430F2013 have one. But of course I don't know your apllication. Although you normally do not need transmissions with a different bitcount than 8, I agree that this functionality could be handy in some cases. Would be great if you could tell the USCI module how many bits to shift out. Anyway - are you sure your slave only wants to see let's say 5 bits? Or are the other 3 don't care ones?

    Another option would be using bitbanging if the amount of data isn't that huge.

    Dennis

  • As Robert noted above, the parametric search was of not use.

    I have found the MSP430x20x2 and MSPx20x3 series have the USI, but as Dennis noted, these are small compared to what I have now. I'm not sure MSP430F2452 exists. I found MSP430G2x52 & MSP430G2x12 that both have the USI module.

    I'm hoping to avoid bit-banging.
    Thanks for the info.
  • Michael LAvole said:
    I'm not sure MSP430F2452 exists.

    Sorry, I meant MSP430G2452, not F. I will correct that.

  • >As Robert noted above, the parametric search was of not use.
    That's the point - if TI product list does not have matching msp430 chip then most probably there is no any.
    Maybe you describe what you want to achieve and we all can think of solution other than just finding hi-end chip with lo-end peripheral?
  • Ilmars said:
    >As Robert noted above, the parametric search was of not use.
    That's the point - if TI product list does not have matching msp430 chip then most probably there is no any.

    The point I was making was that the parametric Search gives no option to find chips based on SPI module type (USCI vs USI vs USART). Even if there were a high-end MSP430 with USI, the parametric search would not help you find it...

  • Robert Cowsill said:
    parametric Search gives no option to find chips based on SPI module type (USCI vs USI vs USART)

    Oh, I missed that. Thank you for pointing out.

    Anyway question about application that needs variable SPI transfer length, is still open. Maybe there's way around apart from obvious bit-banging.

  • One idea that I've seen used before is to combine the hardware SPI output with bit banging. For example, it can be used to get 9-bit output on MSP430's equipped with USCI. The hardware sends eight bits, then the CPU switches the pins to GPIO and sends another bit. The output waveform is probably quite ugly as you can imagine. The CPU does a lot of extra work, but less than a fully software implementation.

    In this case the extra bits would only be needed to transmit the remainder (bits_required % 8), so it might not be too bad an option for longer bit strings.

    Michael, what range of bit string lengths does your application need to send to the slave? If the datasheet is publicly available a link to it would be useful too.

  • In ref to RobertC comments:
    The slave can only do 9 bit words. One (bit9) MSb as a reg/data flag then a byte of payload. The regNum is a single word. The data could be zero or many words.
    I thought about doing something similar to your suggestion, but I doubt it would have be successful. Run the I/O for one bit then the USCI module for the other 8. I didn't see the advantage over just bitBanging the whole thing. If I can't off-load the comm to a SPI module, I tie up the main processor anyway. It seemed like a lot of extra shuffling for no gain.

    It is an existing design, I was hoping for a minimal impact. W/o a HW solution, it looks like bitBanging might be it.

    Thanks for the idea.
  • Bit-banging SPI isn't so bad -- maybe 20 lines of code. My observation is that if your SPI is running fast enough, interrupts don't buy you anything, so dedicating the CPU for the duration isn't a big loss.

    Have you considered bit-packing the data (a lot of shifts and ORs) then sending it as 8-bit bytes? You'll need to check the device manual for words to the effect that it clears itself (rather than getting stuck mid-word) when CS is de-asserted, but many (most?) devices do this.

    In my world, a board re-design is pretty expensive, so I'm usually willing to stand on my head to avoid it.

  • Would you tell the used type of slave? Just for interest?