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MSP430FR5859 Hangs when using I2C in slave mode and a timer

Other Parts Discussed in Thread: MSP430FR5859

Hi There,

I am having an issue with MSP430FR5859 and its I2C in slave mode.  

Like the screenshot below, when repeat start is issued immediately after MSP430FR5859 acks, MSP430FR5859 will hangs.  It may not happen to each transmission, but it will happen in 5 minutes (the master periodically access data from MSP430FR5859).  By the way, the hanging only happens when a timer is also used.  when I disable the timer, it doesn't hang.

 

However, if there is a small delay (16.5us) between repeat start and the ack from MSP430FR5859 like the screenshot below, MSP430FR5859 never hangs.  I let it run for 5 days straight, and MSP430FR5859 never hung.  

 

Does anyone have an idea why MSP430FR5859 would hang?   Thank you

 

regards,

Kevin

 

  • Being mostly a software guy, I'm inclined to check the code first (the light is better over there).

    I suspect the timer is a big clue -- my first thought would be "what if there is a timer event [interrupt, probably] right when the Repeat-Start is received?" Does the timer have an ISR? What does it do?

    Also, what does "hang" mean exactly? Stuck in a spin loop waiting for an I2C event?
  • Hi Kevin,

    Is a timer ISR used? It sounds like this is conflicting with servicing the USCI ISR which is somehow avoided when the delay is put in place. However it is also worth mentioning that I see very little difference between the two screenshots provided, both show the MSP430FR5859 continuing to ACK so I'm not sure how you can tell when it hangs. Is the code stuck in a while loop during this time?

    Regards,
    Ryan
  • Hi Bruce and Ryan,

    Thank you for your response.

    I first thought about bugs in the firmware, too, so we have a piece of test firmware that only has USCI and a timer to clarify.  Basically, in the USCI ISR, it does nothing and only responds the master with 0x00, and the timer ISR only wakes up the CPU.  We also have a GPIO output high in the main loop, and it's pulled low in the timer ISR, and that's how we know when the MSP430FR5859 hangs.  Also, when it hangs, USCI bus lines are either pulled high or low while the master is still transmitting.  Those screenshots were taken when the MSP430FR5859 was still active.  If this is caused by the ISR conflict, do you have any suggestion?

    Thank you

    #pragma vector=USCI_B0_VECTOR

    __interrupt void USCI_B0_ISR(void)

       {

           switch(__even_in_range(UCB0IV, USCI_I2C_UCBIT9IFG))//0x1e))

           {

           case 0x00:                                          // Vector  0: No interrupts

               break;

           case 0x02:                                          // Vector  2: ALIFG, Arbitration-lost

               UCB0IFG &= ~UCALIFG;

               break;

           case 0x04:                                          // Vector  4: NACKIFG, None-Ack

               UCB0IFG   &= ~UCNACKIFG;//master

               break;

           case 0x06:                                          // Vector  6: STTIFG, START condition detected interrupt

               UCB0IFG &= ~UCSTTIFG;                       // Clear start condition int flag

               break;

           case 0x08:                                          // Vector  8: STPIFG, STOP condition detected interrupt

               UCB0IFG &= ~UCSTPIFG;                       // Clear stop condition int flag

               break;

           case 0x0A:  // Vector 10: RXIFG3    // Vector 10: RXIFG, USCI receive interrupt

               break;                                      // Reading UCBxRXBUF resets UCRXIFG

           case 0x0C:  // Vector 12: TXIFG3        // Vector 12: TXIFG, USCI transmit interrupt

               break;

           case 0x0E: // Vector 14: RXIFG2

               break;

           case 0x10: // Vector 16: TXIFG2

               break;

           case 0x12: // Vector 18: RXIFG1

               break;

           case 0x14: // Vector 20: TXIFG1

               break;

           case 0x16: // Vector 22: RXIFG0

               UCB0IFG &= ~UCRXIFG0;

               rx_buf = UCB0RXBUF;

               break;

           case 0x18: // Vector 24: TXIFG0

               UCB0IFG &= ~UCTXIFG0;

               UCB0TXBUF=0x00;

               break;

           case 0x1A: // Vector 26: BCNTIFG

               break;

           case 0x1C: // Vector 28: clock low timeout

               UCB0IFG &= ~UCCLTOIFG;

               break;

           case 0x1E: // Vector 30: 9th bit

               break;

           default:

               break;

           }

       }

    #pragma vector=TIMER0_A0_VECTOR

    __interrupt void TIMER0_A0_ISR(void)

    {

       ticker_025++;

       __bic_SR_register_on_exit(LPM3_bits);

       DBG_PIN4_4_LOW;

    }

    regards,

    Kevin

  • What is the foreground (main()) doing at this time?

    Before we get too deep into the I2C stuff, here's one thing to check for (it's quick): I've seen a number of code fragments over the years which go into LPM expecting something to happen, but, when they are awakened, they don't bother to check whether that thing has actually happened. This of course causes all sorts of trouble when there are multiple ISRs doing LPM_EXITs. It may be worth 5 seconds looking at the (foreground) LPM code to make sure it's properly interlocked.
  • Hi Bruce,

    In the main of the test firmware, I have fairly simple code.  The delay and the GPIO control are from the application firmware, which i forgot to remove.  I have attached the test firmware.  Please let me know if you see something inappropriate.  Thank you

    while(1)

       {

           if(ticker_025_pre != ticker_025)

           {

               ticker_025_pre = ticker_025;

               __delay_cycles(80000);

               if(rx_buf%2 == 0) DBG_PINJ_1_LOW;

           }

           DBG_PIN4_4_HIGH;

           __bis_SR_register(LPM3_bits + GIE);

       }

    regards,

    Kevin

  • Here's a curiosity: The errata sheet (SLAS457J) lists
    -----------------------------------
    PMM24: Device may enter lockup state during wake-up from LPM3 and LPM4

    The device may enter a lockup state during an interrupt-triggered wake up from LPM3 or
    LPM4. The device will remain in lockup state, unable to respond to the interrupt or
    continue application execution, until a power cycle brings it back to reset state

    Workaround 1) Use LPM2 instead of LPM3 or LPM4.
    -----------------------------------
    That's not many pre-conditions to meet. Maybe the I2C thing is a red herring?

    Trying LPM2 is probably quicker than wondering.
  • Hi Bruce,

    I have changed the LPM3 to LPM2 in the test firmware, and the MSP430FR5859 hasn't hung yet for last two hours.  However, I am not certain if this is the cause of my issue yet.  I will have to have it run longer and on other MSP430FR5859, as well, and I will get back to you with my experiement results.  In the meantime, if you have other thoughts about my issue, please also let me know.

    Thank you

    regards,

    Kevin

  • Good catch Bruce, I am also interested to see if PMM24 is the root cause of the issue. If so and power consumption is of a concern for the application then it is worth mentioning that the errata has been fixed on the latest silicon revision (H).

    Regards,
    Ryan
  • Hi Bruce and Ryan,

    I think PMM24 is the root cause. I let it run for more than 12 hours, and it hasn't hung at all. Thank you for much more your help. I really appreciate it.

    regards,

    Kevin
  • Hi Ryan/Bruce,

    According to errata, revision G silicon may enter lockup state during wake up from LPM3 and LPM4. Do we have any other documentation about this problem?

    My customer wants to know detailed information to respond their end customers. Please advise your idea, thanks for help.

    Luke
  • Luke, we will handle this request offline.

    Ryan

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