Other Parts Discussed in Thread: MSPWARE, MSP430FR5969, MSP430FR5739
Hi,
My customer is having difficulties to get the MSP430FR5736 to enter/exit LPM4.5.
The code is running on a custom board, and has been stripped from its original application to isolate the problem around the LPM4.5 functionality.
The attached code below has been tested both with and without an emulator connected. In both cases the current consumption by the MSP is still stable at around 5 uA after the attempt to enter LPM4.5. We believe that all I/O pins are pulled up/down correctly and the problem is not related to HW but rather has to do with the SW used to enter LPM4.5. For some reason it looks like the MSP is still alive and responsive on the JTAG interface after the LPM4.5 code has been executed. As I have understood it, this shouldn’t be possible, correct?
The example below is based on the following version of MSPWare 1_60_03_07.
Pin P2.2 is configured as an LPM interrupt to wake up the MSP from LPM4.5 on a falling edge. But there seem to be problems with both entering LPM4.5 and, if we are entering it something is strange during exit:
- After the LPM4.5 code has executed the power consumption remain at 5uA and it is still possible to access the MSP using the debugger.
- No BOR is detected when a falling edge is forced to P2.2.
Please have a look at this short example and advise us on what might be wrong in the way we try to enter LPM4.5.
Thanks and regards,
Joakim
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#include <driverlib.h>
#include "inc/hw_regaccess.h"
//******************************************************************************
//!
//! Empty Project that includes driverlib - Test LPM4.5 for MSP430FR5736
//!
//******************************************************************************
static void SetLPM4_5(void)
{
// Close down inactive modules
WDTCTL = WDTPW | WDTHOLD; // stop watchdog (do this first)
DMA0CTL = DMA1CTL = DMA2CTL = 0u; // Turn off DMAs
TA0CTL = TA1CTL = 0u; // turn off timers
RTCCTL0 = 0u; // turn off RTC
REFCTL0 &= ~REFON; // turn internal voltage REF module OFF
// Stop clock functions
CSCTL0 = CSKEY; // access password
CSCTL1 = 0u; // clear
CSCTL2 = SELA_1; // Select VLO for ACLK
CSCTL4 = 0u; // clear all bits
CSCTL4 |= (SMCLKOFF); // set some bits
CSCTL5 &= ~(XT1OFFG); // clear clock faults
CSCTL6 = 0u; // all REQEN's off
HWREG8(CS_BASE + OFS_CSCTL0_H) = 0x00; // lock CS registers
// Ports off
P1OUT = 0x00; P2OUT = 0x00; PJOUT = 0x00;
P1DIR = 0xFF & ~(BIT6); // set as outputs
// Setup LPM interrup I/O
P2IE |= (BIT2); //enable Port interrupt
P2IES |= (BIT2); //interrupt on falling edge
P2IFG &= ~(BIT2); //clear interrupt flag
// Disable SVS
PMM_disableSVSL(PMM_BASE);
PMM_disableSVSH(PMM_BASE);
PMM_regOff(PMM_BASE); // PMMREGOFF = 1. Used for LPMx.5
__bis_SR_register(GIE+LPM4_bits); // Enter LPM4
}
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop WDT
// check PMM state after reset
if (PMM_getInterruptStatus(PMM_BASE, PMMRSTIFG))
{
PMM_clearInterrupt(PMM_BASE, PMMRSTIFG);
}
// check PMM state after BOR
if (PMM_getInterruptStatus(PMM_BASE, PMMBORIFG))
{
PMM_clearInterrupt(PMM_BASE, PMMBORIFG);
}
// Have just exited from LMP4.5?
if (PMM_getInterruptStatus(PMM_BASE, PMMLPM5IFG))
{
__no_operation(); // Set breakpoint here to trap BOR condition
PMM_unlockLPM5(PMM_BASE);
PMM_clearInterrupt(PMM_BASE, PMMLPM5IFG);
PMM_regOn(PMM_BASE);
PMM_enableSVSL(PMM_BASE);
PMM_enableSVSH(PMM_BASE);
}
SetLPM4_5();
__no_operation();
while (1)
{
// Will only be here when in active mode
__no_operation();
};
}
// Wake up port pin interrupt
#pragma vector=PORT2_VECTOR
__interrupt void Port2_ISR(void)
{
P2IFG &= ~(BIT2); //clear interrupt flag
// enable this code if active mode required
//PMM_regOn(PMM_BASE);
//LPM4_EXIT;
}
#pragma vector=PORT1_VECTOR
__interrupt void Port1_ISR(void)
{
__no_operation();
}