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CCS/msp430f6438: UCS and oscillator

dison wang
Expert 1620 points
Part Number: MSP430F6438

Tool/software: Code Composer Studio

Hi There,

I use the MSP-TS430PZ100C (REV1.1) with MSP430F6438 MCU.

I have 2 questions here.

Q1. I want use XT1 with a 32.768KHZ crystal. The resistor R6 and R8 are 0. The crystal come with the MSP-TS430PZ100C board. The C1 and C2 do not soldering anything. But the xt1 did not work.

When I change the UCSCTL6 --- XCAP from 0-3, the xt1 still did not work. I also change c1,c2 to 6pf,9pf and XCAP be changed too. xt1 still did not works. Is there some one know the answer.

Q2. Because the xt1 did not works, the internal oscillator be used automatically. I setup the ACLK output to P1.0 and SMCLK output to P3.4 for measure these clock signal by Oscilloscope.

The ACLK's source is xt1, The MCLK and SMCLK's source is DCOCLKDIV.

When I want setup the DCO for SMLK =10MHz, (UCSCTL1--DCORSEL=4; UCSCTL2---FLLD=4;UCSCTL2---FLLN=609; UCSCTL3----FLLREFDIV=2; rest register keep default value), I get a 9.74Mhz.

When I increate the FLLN, the SMCLK do not change. Is there some one know the reason and explain how to setup the DCO and what mean of the DCO Frequency table in datasheet page 55. Because I think the DCOx and MODx will be adjust by DCO for stabilize a frequency I want.

(Notes: When I setup those register like UCSCTL1--DCORSEL=4; UCSCTL2---FLLD=16;UCSCTL2---FLLN=461; UCSCTL3----FLLREFDIV=12, The SMCL is 1.22MHz, The result is almost correct which mean DCOCLK= D* DCOCLKDIV =16* 1.22MHz = 19.52Mhz; By count form the DCOCLK should be 19.966634667MHz )

Thanks,

Dison. 

  • 0
    Guru 243910 points
    There might be a bug in your code. Which you have not shown.
  • 0 in reply to Clemens Ladisch
    Expert 1620 points

    Hi Clemens,

    Below is my code.

    void userts_UCS_init(void)
    {
     
        UCS_clearFaultFlag (UCS DCOFFG);
        //a setup SMCLK =10MHz   Result =9.74MHz
         UCSCTL1_L = DCORSEL_4;                      // SETUP THE FDCOCLK =4 12.3---28.2MHz
         UCSCTL2 = FLLD_1 + 0x261;                 //SETUP FDCOCLK =20.0103253333333MHz  FDCOCLK=10.005162666666MHz
        UCSCTL3_L = FLLREFDIV_1;
    }

    void main(void)
    {
        userts_Watchdog_init();
        userts_UCS_init();
        userts_gio_init();

        while(1)                                  // continuous loop
         {

         }

    }

    Please help me to find the bug.

    Do you know the answer about the 2nd question?

    Thanks

    Dison

  • 0 in reply to dison wang
    Guru 243910 points
    This code does not attempt to initialize XT1. Anyway, there are example programs (for both raw register accesses, and driverlib) that show how this is to be done.

    When XT1 does not run, the clock system uses REFO instead (which has looser tolerances).

    The DCO frequency table shows ranges because the DCO is not calibrated at all. To get a somewhat fixed frequency, you must use the FLL and a reference clock.

    In theory, changing FLLN should change the target frequency. But your code does not attempt to change FLLN.

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