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MSP430F425A: SD16 A/D converter and its input properties

J�zsef Hermann
Intellectual 1000 points
Part Number: MSP430F425A

Dear Forum Members,

I am interested in the the SD16 operation / charteristics and i would like tos some help.

First I would like to fully understand ist analog input.

Whether analog input is fully differential (on chip PGA performs differential to signle ended conversion to SD modulator)?

If so, external instrumentation amplifier may not needed when bridge sensor differential signal needs to be measured (of course - common mode range must be

kept in 0..VFREF range).

Can the AI+ and AI- be below the AVSS level? However, this would suggest analog input shall be ground (AVSS) referenced.

Therefore, not clear for me, whether signal input handling fully differential or AVSS refrenced allowing negative swing.

Other question referred to SD operation itself. Unfortunately, I am familar only with 1st order sigma-delta architecture. In this case for 10 bit equivalent resoulution

1024 clk cycle needed for 1 conversion. How many needed in case of SD16 (conversion speed)?

I know the oversampling principle but I cannot accociate with MSP430 SD16 or sigma-delta operation. Generally, OSR=fs/(2*fmax), where fmax is the upper frequency limit of the incoming signal spectra to be digitalized (Nyquist frequency, for sampling, fs= 2*fmax needed minimum avoiding spectral aliasing)

Thank you in advane,

Joseph

  • 0
    TI__Mastermind 49692 points

    Hello Joseph,

    I don't believe that the integrated PGA in the SD16 module performs differential to single-ended conversion, but you can configure the external analog front-end to be single-ended or fully differential. If you're using a Wheatstone bridge, this signal is typically differential, so this should work fine. To answer your other question, the datasheet specifies that the absolute input voltage range is from AVSS - 1.0V (min) to AVCC (max). Actually, the Common-mode input voltage range is identical (see page 28 in the datasheet). Since the SD16 module is an analog module, it's referenced to AVCC and AVSS instead of DVCC and DVSS. Also, I'd recommend keeping your max signal below the Full Scale Range (FSR) for the best performance.

    Like you accurately pointed out, your minimum sampling frequency (fsample) must be equal to at least the Nyquist frequency (2*fmax). Then, the sampling frequency is set by configuring the modulation frequency (fmod, some parts have this frequency fixed and can't be changed) or changing the Over Sampling Rate (OSR) value for the SD16 module. The modulation frequency is over-sampled by the OSR value. Thus, fsample = fmod / OSR. You can read more about the SD16 module in Section 29.1 in the User's Guide.

    Hopefully this helps.

    Regards,

    James

    MSP Customer Applications

  • 0 in reply to James Evans
    Intellectual 1000 points

    Hello James,

    thank you vm for the quick answer!

    Now, I understand the SD16 input signal ranges.

    The S-D conversion speed formula and the role of the OSR value also clear.

    SD operation In my context:

    modulator itself clocked from Fmod freqquency.

    take a sampe with 1/Fmod speed (using internal Cs sample capacitors).  During 1/Fmod time sample cap shall be charged fully to input voltage.

    modulator generates a PDM serial bitsream with bit-time=1/Fmod.

    serial-to parallel conversion is performed by the digital filter (average : number of 1's / num of conv cycles)

    Digital FIR filter also clocked by Fmod. Filter Order (Number of taps N=32,256 etc) set by OSR value

    Decimation: Digital filter produces a new output value in every Nth sample. New sample rate fs=fmod/OSR.

    Is it correct?

    However, I do not know what is the number of conversion cycles. 16 bit suggests 65536..(Averageing PDM stream 1's).

    In the SLAA104 appnote, a similar integrating A/D presented using Comparator_A. In this

    case the result in 0..3300 range (corresponding to 0..3,3V VCC) and needs 3300 cycle for conversion.

    Altough the paper does advertise this solution as Sigma-Delta, but I think in fact it is only Delta modulation (integrator - RC filter - in the feedback).

    Kind regards,

    József

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