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SPI DAC TLV5626 - Problem

Other Parts Discussed in Thread: MSP430F2616, TLV5626

Hello,

I have interfaced TLV5626 to MSP430F2616. It is a 3 wire interface with MSP as the master. The port pins used are P3.0, 1,&3 (UCBSTE, UCB0SIMO,UCB0CLK). As per the application information of the device I am first writing the setting(s) of the device to the control register  and is followed by writing the DAC value.  I am not getting any output. Could anyone go through the code listed below and indicate to me if I am making an error.

I am using an HFXTL  - 8 MHz.

BCSCTL1 &= ~XT2OFF;                                  // Activate XT2 high freq xtal
do
{
  IFG1 &= ~OFIFG;                                              // Clear OSCFault flag
  for (i = 0x47FF; i > 0; i--);                                 // Time for flag to set
}
  while ((IFG1 & OFIFG));                                   // OSCFault flag still set?
  BCSCTL2 |= SELM_2+SELS;                         // MCLK = XT2 HF XTAL (safe).

// -----------  SPI Port Setup. 
  P3DIR |= BIT0+BIT1+BIT3;                                            // o/p dir for P3.0(ste)
  P3OUT |= BIT0;                                                               // CS signal - o/p HIGH.  
  P3SEL |= BIT1+BIT3;                                                      // P3.3,1 option select
  UCB0CTL1 = UCSSEL_2+ UCSWRST;                     // **Put state machine in reset** 
  UCB0CTL0 |= UCSYNC+UCCKPL+UCMSB;            // 3-pin, 8-bit SPI master  
  UCB0BR0 = 0x02;                                                           // SMCLK/2
  UCB0BR1 = 0;   
  UCB0CTL1 &= ~UCSWRST;                                         // **Initialize USCI state machine**  
   for(i=0xff;i>0;i--);                                                              // delay.
_NOP();

//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

// --- Send Control word 0xD002, [ ref = 2.048, fast mode ] MSB First..,

 P3OUT &= ~BIT0;                      // CS = Low (device selected).
  for(i=0xff;i>0;i--);                        // delay  

while(!(IFG2 & UCB0TXIFG));
  UCB0TXBUF = 0xD0;               // msb first  

while(!(IFG2 & UCB0TXIFG));
UCB0TXBUF = 0x02;

  for(i=0xff;i>0;i--);                         // delay.
  P3OUT |= BIT0;                          // CS = High (deselected).  
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
for(i=0xffff;i>0;i--); // delay
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
// data = 0x500, i.e, o/p = 1.2 volts.

P3OUT &= ~BIT0;                          // CS = Low (device selected).  
for(i=0xff;i>0;i--);

while(!(IFG2 & UCB0TXIFG));
UCB0TXBUF = 0xC5;

while(!(IFG2 & UCB0TXIFG));
UCB0TXBUF = 0x00;

for(i=0xff;i>0;i--);
  P3OUT |= BIT0;                            // CS = High (deselected).  
//----------------------------------------------------------------------

Regards

Prasad

 

  • Hi,

    how does your test setup look like? Have you just connected the SPI terminals?

    I would recommend to use at least a pull-up resistor on CS terminal. The MCU
    I/Os are configured as digital inputs after a reset. It takes a while till your code
    change it to a digital output. During this time the slave could see some spikes
    add shift a few bits... This is good enough to block it...
    The pull-up ensures that the slave will not receive any bit (or see spikes) until
    the MCU has its I/Os under control.

    Maybe your are fighting with such an issue ....

  • Prasad,

    I recommend you look at the SPI code at:

    http://focus.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=slaa325a

     

    Although the code above is for CCxxxx transceivers, the basics of SPI are very similar across the board. Even long term you will need to develop SPI basic functions that will be the building blocks for a higher level driver. It will require some modification because there's no receiving information from the TLV chip, but it might help.

    Aside from this, ensure that the polarity and phase of the SPI module is correct to what the TLV chip requires.

     

    SLAA123 from TI has the MSP430 connected to another TLV DAC. http://focus.ti.com/lit/an/slaa123/slaa123.pdf
    It's in assembly but you can readily see which settings are applied to the SPI module for the interface. If the two DACs are similar, then it should help you.

     

    GL

  • Badri Prasad said:
    The port pins used are P3.0, 1,&3 (UCBSTE, UCB0SIMO,UCB0CLK)

    Actually not. UCBSTE is only required and unsed if the MSP is in slave mode or multimaster mode. If the MSP it the only master, UCBSTE shouldn't be used. YOu can, however, use teh port pin itself (and you do it that way), but you could use any other port pin as well.

    Badri Prasad said:
      for(i=0xff;i>0;i--);                        // delay

    THis is no delay. If it works as dely, this is pure coincidence. Any optimizing compiler will detect that this loop has no effect other than setting i=0 and will eliminate it. Use _-delay_cycles(x) to generate a delay of x MCLK cycles or (the by far better way) use a timer.
    But usually, the required delay between setting the chip select (CS) low and the beginning of teh data transfer is so short, the plain execution speed of the MSP instructions is delay enough. Maybe on __no_operation() or two ar eneeded. It depends on the MCLK speed.

    Badri Prasad said:
    while(!(IFG2 & UCB0TXIFG));
      UCB0TXBUF = 0xD0;               // msb first  

    while(!(IFG2 & UCB0TXIFG));
    UCB0TXBUF = 0x02;

      for(i=0xff;i>0;i--);                         // delay.
      P3OUT |= BIT0;                          // CS = High (deselected).  

    The first while loop tells your problem. If the SPI isn't busy (which is may not be at this point), you don't need this delay.
    What you need to do is to writ ethe first byte, wait for UCB0TXIFG (which should go on immediately if the SPI clock isn't very slow compared to your MCLK), then write the second byte, and then WAIT until it has been sent, before you delesect CS.

    If TXIFG comes, it does not mean that the byte has been sent. It means that the output buffer is empty.
    In your setup you write the first byte, then, when the first byte is moved into the output shift register, TXIFG comes and you write the second byte. Then you delesect the slave, while maybe just the first bit of the first byte has been shifted out.

    Before you deselect CS, you need to wait for both bytes (the one in the output shift register and the one in the output buffer) have been sent. Els teh slave will 'close its eyes' and miss most of the 16 bits you're sending.

    To detect whether really all bits have been sent, check the busy bit in one of the UCB registers.

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