MSP430FR5987: ADC12B Interrupt

I have initialized the ADC12B on the MSP430fr5987 but can not get it to generate and interrupt??? Single conversion triggered of ADC12ENC.

P9SEL0 |= BIT2;                    //Set P9.2 as Analog Input, A10
     P9SEL1 |= BIT2;

    ADC12CTL0 = ADC12ON;           // ADC12ENC = 0 , ADC12SC=0

     // REF_A SLAU367L p.668
     while(REFCTL0 & REFGENBUSY);     // If ref generator busy, WAIT
     REFCTL0 |= REFVSEL_1+REFON;      // Select internal ref = 2.0V

     // Sample & Hold Time use 16 sample clocks for MEM0 thru MEM32
     ADC12CTL0 |= 0x2200;             //  ADC_SMP_16;

     // use MOD Clock
     ADC12CTL1 |= 0x18;  //TODO Try SMCLK  ADC_CLK_MOD;

     // single channel single conversion
     ADC12CTL1 |= 0x0;                // ADC_SNGL;

     // Invert single sample and hold
     ADC12CTL1|= 0;                   // no invert

      // use 12 bit resolution
     ADC12CTL2 |= 0x0020;             // ADC_12_BIT;

     // VR+ = VREF buffered (2.0V), VR- = AVSS (0V)
     ADC12MCTL0 |= 0x0100;            // ADC_REF_VRF;

     //INCHx = 10  (A10 or DAC VOUTB)
     ADC12MCTL0 |= 0x000A;            // 10;

     ADC12IFGR0 = 0x0000;                  // clear the interrupt flag
     ADC12IFGR1 = 0x0000;
     ADC12IFGR2 = 0x0000;

     ADC12IER0 = ADC12IE0;           // Enable interrupt for ADC12MEM0
     ADC12IER1 =0;                   // Disable interrupts for MEM16 thru MEM31
     ADC12IER2 =0;                   // Disable interrupts for aux inputs

     ADC12CTL0 |= 0x0003;              // ADCSC = On,ADCENC= On

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#pragma vector=ADC12_VECTOR
__interrupt void ADC12 (void)
{

   __disable_interrupt();                // disable any more interrupts
    
   ADC12CTL0 &= 0xfffc;                     // ADC12ENC =0, ADC12SC =0

//switch(__even_in_range(ADC12IV, ADC12IV_ADC12RDYIFG))
//  {
// case ADC12IV_NONE:        break;        // Vector  0:  No interrupt
// case ADC12IV_ADC12OVIFG:  break;        // Vector  2:  ADC12MEMx Overflow
// case ADC12IV_ADC12TOVIFG: break;        // Vector  4:  Conversion time overflow
// case ADC12IV_ADC12HIIFG:  break;        // Is A1 > 2V?: High Interrupt
// case ADC12IV_ADC12LOIFG:  break;        // Is A1 < 1V?: Low Interrupt
// case ADC12IV_ADC12INIFG:  break;        // Vector 10:  ADC12IN
// case ADC12IV_ADC12IFG0:
//
//      break;        // Vector 12:  ADC12MEM0
//
//
// case ADC12IV_ADC12IFG1:   break;        // Vector 14:  ADC12MEM1
// case ADC12IV_ADC12IFG2:   break;        // Vector 16:  ADC12MEM2
// case ADC12IV_ADC12IFG3:

      ADC_Capture_Data(adc_rslt);

//     break;        // Vector 18:  ADC12MEM3
// case ADC12IV_ADC12IFG4:   break;        // Vector 20:  ADC12MEM4
// case ADC12IV_ADC12IFG5:   break;        // Vector 22:  ADC12MEM5
// case ADC12IV_ADC12IFG6:   break;        // Vector 24:  ADC12MEM6
// case ADC12IV_ADC12IFG7:   break;        // Vector 26:  ADC12MEM7
// case ADC12IV_ADC12IFG8:   break;        // Vector 28:  ADC12MEM8
// case ADC12IV_ADC12IFG9:   break;        // Vector 30:  ADC12MEM9
// case ADC12IV_ADC12IFG10:  break;        // Vector 32:  ADC12MEM10
// case ADC12IV_ADC12IFG11:  break;        // Vector 34:  ADC12MEM11
// case ADC12IV_ADC12IFG12:  break;        // Vector 36:  ADC12MEM12
// case ADC12IV_ADC12IFG13:  break;        // Vector 38:  ADC12MEM13
// case ADC12IV_ADC12IFG14:  break;        // Vector 40:  ADC12MEM14
// case ADC12IV_ADC12IFG15:  break;        // Vector 42:  ADC12MEM15
// case ADC12IV_ADC12IFG16:  break;        // Vector 44:  ADC12MEM16
// case ADC12IV_ADC12IFG17:  break;        // Vector 46:  ADC12MEM17
// case ADC12IV_ADC12IFG18:  break;        // Vector 48:  ADC12MEM18
// case ADC12IV_ADC12IFG19:  break;        // Vector 50:  ADC12MEM19
// case ADC12IV_ADC12IFG20:  break;        // Vector 52:  ADC12MEM20
// case ADC12IV_ADC12IFG21:  break;        // Vector 54:  ADC12MEM21
// case ADC12IV_ADC12IFG22:  break;        // Vector 56:  ADC12MEM22
// case ADC12IV_ADC12IFG23:  break;        // Vector 58:  ADC12MEM23
// case ADC12IV_ADC12IFG24:  break;        // Vector 60:  ADC12MEM24
// case ADC12IV_ADC12IFG25:  break;        // Vector 62:  ADC12MEM25
// case ADC12IV_ADC12IFG26:  break;        // Vector 64:  ADC12MEM26
// case ADC12IV_ADC12IFG27:  break;        // Vector 66:  ADC12MEM27
// case ADC12IV_ADC12IFG28:  break;        // Vector 68:  ADC12MEM28
// case ADC12IV_ADC12IFG29:  break;        // Vector 70:  ADC12MEM29
// case ADC12IV_ADC12IFG30:  break;        // Vector 72:  ADC12MEM30
// case ADC12IV_ADC12IFG31:  break;        // Vector 74:  ADC12MEM31
// case ADC12IV_ADC12RDYIFG: break;        // Vector 76:  ADC12RDY
// default: break;
//  }

      ADC12IFGR0 = 0x0000;                  // clear the interrupt flag
      ADC12IFGR1 = 0x0000;
      ADC12IFGR2 = 0x0000;
 
 __enable_interrupt();                   // re-enable interrupts

 ADC12CTL0 |= ADC12ENC | ADC12SC;        // Start sampling/conversion

}
------------------------------------------------------------------

 void ADC_Capture_Data(unsigned int *data)
 {

      data[0] = 1;

      data[1] =  ADC12MEM0;
      data[2] =  ADC12MEM1;
      data[3] =  ADC12MEM2;
      data[4] =  ADC12MEM3;
}