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MSP430F22xx: LFXT1CLK for MCLK. How to?

Other Parts Discussed in Thread: MSP430F2234

Hello, engineers!

Could you help me to run MCLK from LFXT1CLK source at msp430f2234 device?

Now LFXT1CLK (32.768kHz) sourcing ACLK and it's works fine, but MCLK (and SMCLK) always running from DCO. 

That's my simple code (I'm using IAR):

  BCSCTL2 = SELM_3 + DIVM_0;  // MCLK ClkSrc: LFXTCLK; DIVM=1; SMCLK=DCOCLK; DIVSM=1; DCO=0 - int.res.

  BCSCTL3 = XCAP_1;       // XIN/XOUT Cap : 6 pF

 

Thanks

 

  • You need to wait for the crystal oscillator to stabilize, clear the OFIFG, before you can select it to source MCLK. Otherwise TI's "fail-save" feature will FAIL you. They just ignore your settings and call that "fail-save" -- with the same attitude  as c-compilers that silently ignore and eliminate statements in your source code. They are trying to "protect" you and make their product "fool-proof" -- meaning that we are fools.

  • Sergey,

    Certainly your code looks okay. Are you sure there is nothing in your code later that modifies BCSCTL2 again? I've gotten myself in trouble with that many times. Can you run in the debugger and see what BCSCTL2 is actually set to?

    Mike

  • OCY is correct - it is the failsafe that is the problem.  I was caught out by this the first time I used a 2xx device.  Tucked away in the UG inside section 5.2.7 (Failsafe operation) is a page that explains how to source MCLK from a crystal: clear OFIFG and wait >50us then test OFIFG again - keep looping this until the fault flag remains cleared.  Then set the SELM bits once this loop has completed.

  • Thanks to all!

    Of course, that's my fault... all because of my inattention :) I was watching for register pages, but passed through next useful information:
    Sourcing MCLK from a Crystal
    After a PUC, the basic clock module+ uses DCOCLK for MCLK. If required, MCLK may be sourced from LFXT1 or XT2.
    The sequence to switch the MCLK source from the DCO clock to the crystal clock (LFXT1CLK or XT2CLK) is:
    1) Switch on the crystal oscillator and select appropriate mode
    2) Clear the OFIFG flag
    3) Wait at least 50 μs
    4) Test OFIFG, and repeat steps 1-4 until OFIFG remains cleared. 

    I'm in sackcloth and ashes.
    Thanks again!

  • Can I have the code for this?

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