CCS/MSP430FR2111: Code porting ADC functionality from MSP430G2131 to MSP430FR2111

Hi Blake,

Looking over the schematic for the DRV8837EVM, it looks like the potentiometer is connected to the MSP430 VREF+ reference voltage output on one side, ground on the other, and the tap is going to the ADC input.  This is a nice setup in that the potentiometer should vary the ADC input across full range if the ADC is also referenced to VREF.  On the MSP430FR2111, the internal ADC VREF is 1.5V, and the external VREF is 1.2V, so you won't quite get full range.  

Are you using a similar topology with your new hardware?  You can output the reference in a similar way with the MSP430FR2111, but there is some PMM configuration required.  The VREF+ output on the new MCU is on P1.7.  To output VREF+, you need to mux P1.7 for ADC functionality, and also enable the reference output in the PMM control registers.

When you set up ADCMCTL0, you also want to set up the reference for the ADC.  If you want to use the internal reference, you'll have something like this:

ADCMCTL0 |= ADCINCH_1 | ADCSREF_1;

For the PMM reference generation, your setup would look like this:

    // Configure reference
    PMMCTL0_H = PMMPW_H;
    PMMCTL2 |= INTREFEN | EXTREFEN;
    __delay_cycles(400);                                      // Delay for reference settling

I also assume that you want to run a timer-triggered, periodic ADC conversion.  Here is a good code example of this:

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//******************************************************************************
//  MSP430FR211x Demo - ADC, Sample A1, internal 1.5V Ref, TB1.1 Trig, Set P1.0 if A1>0.5V
//
//  Description: This example works on Repeat-Single-Channel Mode.
//  A1 is sampled 16/second (ACLK/1024) with reference to 1.5V.
//  Timer_B is run in upmode and TB1.1B is used to automatically trigger
//  ADC conversion. Internal oscillator times sample (16x) and conversion(13x).
//  Inside ADC_ISR if A1 > 0.5V, P1.0 is set, else reset. Normal mode is LPM3.
//  ACLK = XT1 = 32768Hz, MCLK = SMCLK = default DCODIV ~1MHz.
//  //* An external watch crystal on XIN XOUT is required for ACLK *//
//
//                MSP430FR2111
//             -----------------
//         /|\|                 |
//          | |                 |
//          --|RST              |
//            |                 |
//        >---|P1.1/A1      P1.0|--> LED
//
//
//   Xiaodong Li
//   Texas Instruments Inc.
//   Dec. 2015
//   Built with IAR Embedded Workbench v6.40 & Code Composer Studio v6.1
//******************************************************************************

#include <msp430.h>

int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;                                 // Stop WDT

    // Configure GPIO
    P1DIR |= BIT0;                                            // Set P1.0 to output direction
    P1OUT &= ~BIT0;                                           // Clear P1.0
  
    // Configure ADC A1 pin
    P1SEL0 |= BIT1;
    P1SEL1 |= BIT1;

    // Configure XT1 oscillator
    P2SEL1 |= BIT6 | BIT7;                                    // P2.6~P2.7: crystal pins
    
    // Disable the GPIO power-on default high-impedance mode to activate
    // previously configured port settings
    PM5CTL0 &= ~LOCKLPM5;
    
    CSCTL4 = SELA__XT1CLK;                                    // Set ACLK = XT1; MCLK = SMCLK = DCO
    do
    {
        CSCTL7 &= ~(XT1OFFG | DCOFFG);                        // Clear XT1 and DCO fault flag
        SFRIFG1 &= ~OFIFG;                                    
    }while (SFRIFG1 & OFIFG);                                 // Test oscillator fault flag

    // Configure ADC 
    ADCCTL0 |= ADCON | ADCMSC;                                // ADCON
    ADCCTL1 |= ADCSHS_2 | ADCCONSEQ_2;                        // repeat single channel; TB1.1 trig sample start
    ADCCTL2 |= ADCRES;                                        // 10-bit conversion results
    ADCMCTL0 |= ADCINCH_1 | ADCSREF_1;                        // A1 ADC input select; Vref=1.5V
    ADCIE |= ADCIE0;                                          // Enable ADC conv complete interrupt
    
    // Configure reference
    PMMCTL0_H = PMMPW_H;                                      // Unlock the PMM registers
    PMMCTL2 |= INTREFEN;                                      // Enable internal reference
    __delay_cycles(400);                                      // Delay for reference settling    

    ADCCTL0 |= ADCENC;                                        // ADC Enable
    
  
    // ADC conversion trigger signal - TimerB0.1 (32ms ON-period)
    TB0CCR0 = 1024-1;                                         // PWM Period
    TB0CCR1 = 512-1;                                          // TB1.1 ADC trigger
    TB0CCTL1 = OUTMOD_4;                                      // TB1CCR0 toggle
    TB0CTL = TBSSEL__ACLK | MC_1 | TBCLR;                     // ACLK, up mode

    __bis_SR_register(LPM0_bits | GIE);                       // Enter LPM3 w/ interrupts
}

// ADC interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=ADC_VECTOR
__interrupt void ADC_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(ADC_VECTOR))) ADC_ISR (void)
#else
#error Compiler not supported!
#endif
{
    switch(__even_in_range(ADCIV,ADCIV_ADCIFG))
    {
        case ADCIV_NONE: 
            break;                            
        case ADCIV_ADCOVIFG: 
            break;                        
        case ADCIV_ADCTOVIFG: 
            break;                       
        case ADCIV_ADCHIIFG: 
            break;                        
        case ADCIV_ADCLOIFG: 
            break;                        
        case ADCIV_ADCINIFG: 
            break;                        
        case ADCIV_ADCIFG: 
            if (ADCMEM0 < 0x155)                             // ADCMEM = A0 < 0.5V?
                P1OUT &= ~BIT0;                              // Clear P1.0 LED off
            else
                P1OUT |= BIT0;                               // Set P1.0 LED on
            ADCIFG = 0;
            break;                                           // Clear CPUOFF bit from 0(SR)       
        default: 
            break; 
    }  
}

Let me know how I can continue to help.

Regards,
Walter