Other Parts Discussed in Thread: MSP430FR5969
Tool/software: Code Composer Studio
Hi !
I'm use MSP430FR5972 - Timer0_B7
need Pin 26 for PWM (out pin) from TB0.0 to optoLED.
Clock form ACLK. No interrups from TB0 !
Dont work... ;-(
my code is:
...
#include <msp430fr5972.h>
// int _system_pre_init(void)
void _system_pre_init(void)
{
/* Insert your low-level initializations here */
WDTCTL = WDTPW + WDTHOLD; // Stop Watchdog timer
__disable_interrupt(); // Это специальная команда! Это не прерывание.
PM5CTL0 &= ~LOCKLPM5; // Disable the GPIO power-on default high-impedance mode
// to activate previously configured port settings
// Clock System Setup
CSCTL0_H = CSKEY >> 8; // Unlock CS registers
CSCTL1 = 0;
CSCTL1 |= DCOFSEL_6; // Set DCO setting for 8MHz --- установка частоты 8_Мгц
CSCTL2 = 0;
CSCTL2 |= SELA__LFMODCLK; // 010b = LFMODCLK (ACLK == MODOSC/128)
CSCTL2 |= SELS__DCOCLK; // 011b = DCOCLK
CSCTL2 |= SELM__DCOCLK; // 011b = DCOCLK
CSCTL3 = 0;
CSCTL3 |= DIVA__2; // ACLK source divider. Divides the frequency of the ACLK clock source. 001b = /2
CSCTL3 &= ~DIVS__1; // SMCLK source divider. Divides the frequency of the SMCLK clock source. 000b = /1
CSCTL3 &= ~DIVM__1; // MCLK source divider. Divides the frequency of the MCLK clock source. 000b = /1
CSCTL4 = 0;
CSCTL4 |= HFXTOFF; // 1b = HFXT is off if it is not used as a source for ACLK, MCLK, or SMCLK
CSCTL4 &= ~VLOOFF; // VLO off. This bit turns off the VLO. 0b = VLO is on
CSCTL4 &= ~SMCLKOFF; // SMCLK off. This bit turns off the SMCLK. 0b = SMCLK on
CSCTL4 |= LFXTOFF; // 1b = LFXT is off if it is not used as a source for ACLK, MCLK, or SMCLK
// CSCTL5 ???
// CSCTL6 ???
CSCTL0_H = 0; // Lock CS registers
P3DIR = 0; P3OUT = 0;
P3DIR |= BIT0; P3OUT &= ~BIT0; // Set P3.0 to output direction
P3DIR |= BIT1; P3OUT &= ~BIT1; // Set P3.1 to output direction
P3DIR |= BIT2; P3OUT &= ~BIT2; // Set P3.2 to output direction
P3DIR |= BIT4; P3OUT |= BIT4; // Set P3.4 to output direction === OC2A ===
P3DIR |= BIT5; P3OUT &= ~BIT5; // Set P3.5 to output direction
P3DIR |= BIT6; P3OUT &= ~BIT6; // Set P3.6 to output direction
P3DIR |= BIT7; P3OUT &= ~BIT7; // Set P3.7 to output direction === L_control
// TB0.0 ===
// Pin 26 ====== P3.4 (RD)
// or === UCA1SIMO
// or === UCA1TXD
// or === TB0.0
// - see datasheet for MSP430FR5972IPMR -
P3DIR |= BIT4; P3OUT |= BIT4; // Set P3.4 to output direction === OC2A ===
P3SEL0 |= BIT4;
P3SEL1 |= BIT4; // Configure P3.4 for TB0.0
// --- Start init Timer0_B7 --------------------------------------------------------------------------
TB0CTL = 0; // All reset
TB0CTL &= ~TBCLGRP_0; // Timer0_B7 Group: 0 - individually
TB0CTL &= ~CNTL__16; // Counter lenght: 16 bit 00b = 16-bit, TBxR(max) = 0FFFFh --- 01b = 12-bit, TBxR(max) = 0FFFh
// 10b = 10-bit, TBxR(max) = 03FFh --- 11b = 8-bit, TBxR(max) = 0FFh
TB0CTL |= TBSSEL__ACLK; // Timer_B clock source select: 00b = TBxCLK -- 01b = ACLK -- 10b = SMCLK
TB0CTL &= ~ID__1; // Input divider. These bits, along with the TBIDEX bits, select the divider for the input clock. 00b = /1 01b=/2 10b=/4 11b=/8
TB0CTL |= MC__CONTINOUS; // Timer_B mode control: 2 - Continuous up
TB0CTL &= ~TBIE; // Timer_B interrupt enable -- 0b = Interrupt disabled
TB0CTL &= ~TBIFG; // Timer_B interrupt flag: 0b = No interrupt pending
TB0CTL |= TBCLR; // Timer_B clear. Setting this bit clears TBR
TB0CCTL0 = 0; // All reset
TB0CCTL0 |= CM_1; // Capture mode : 00b = No capture 01b = Capture on rising edge 10b = Capture on falling edge
TB0CCTL0 |= CLLD_2; // Compare latch load sourec : 10b = TBxCLn loads when TBxR counts to 0 (up or continuous mode).
TB0CCTL0 &= ~CAP; // Capture mode 0b = Compare mode
//TB0CCTL0 |= CAP;
TB0CCTL0 |= OUTMOD_2; // PWM output mode: 2 - Toggle/Reset 7 - PWM reset/set
//TB0CCTL0 &= ~OUT; // Output. For output mode 0, this bit directly controls the state of the output. 0b = Output low --- 1b = Output high
TB0CCTL0 |= OUT;
TB0CCTL0 &= ~COV; // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0b = No capture overflow occurred. 1b = Capture overflow occurred
TB0CCTL0 &= ~CCIFG; // Capture/compare interrupt flag 0b = No interrupt pending 1b = Interrupt pending
TB0CCTL0 &= ~CCIE; // TBCCR0 interrupt disabled
TB0CCTL0 &= ~TBIE; // TB0 interrupt disabled
TB0EX0 &= ~TBIDEX__1; // Timer0_B7 Input divider expansion : /1
TB0CCR0 = 0xFF;
__bis_SR_register(GIE);
__enable_interrupt();
}
...
in Pin 26 - no any signals...
Please help me.
