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CCS/MSP430FR5972: MSP430FR5972: Timer0_B7 PWM out on P3.4 (TB0.0) dont work

Part Number: MSP430FR5972
Other Parts Discussed in Thread: MSP430FR5969

Tool/software: Code Composer Studio

Hi !

I'm use MSP430FR5972 - Timer0_B7

need Pin 26 for PWM (out pin) from TB0.0 to optoLED.
Clock form ACLK.
No interrups from TB0 !
Dont work...  ;-(

my code is:

...

// === init TB0.0 ===
// SLASE66B --- Table 6-22. Port P3 (P3.4 to P3.7) Pin Functions

 P3DIR |= BIT4; P3OUT &= ~BIT4;      // Set P3.4 to output direction  === OC2A ===
 P3SEL0 = 0; P3SEL1 = 0;
 P3SEL0 &= ~BIT4;                 // SLASE66B --- Table 6-22. Port P3 (P3.4 to P3.7) Pin Functions
 P3SEL1 |= BIT4;                  // Configure P3.4 for TB0.0

// --- Start init Timer0_B7  ---------------------------------------------------------------------------

TB0CTL = 0;             // All reset
//TB0CTL &= ~TBCLGRP_0;            // Timer0_B7 Group: 0 - individually
//TB0CTL &= ~CNTL__16;             // Counter lenght: 16 bit 00b = 16-bit, TBxR(max) = 0FFFFh --- 01b = 12-bit, TBxR(max) = 0FFFh
                                   // 10b = 10-bit, TBxR(max) = 03FFh  --- 11b = 8-bit, TBxR(max) = 0FFh
TB0CTL = TBSSEL__ACLK | MC__CONTINOUS;

TB0CCTL0 = 0;
TB0CCTL0 = CM_0 + CCIS_3 + CLLD_2 + OUTMOD_1;

//TB0CCTL0 &= ~CCIFG;           // Capture/compare interrupt flag 0b = No interrupt pending 1b = Interrupt pending
//TB0CCTL0 &= ~CCIE;            // TBCCR0 interrupt disabled
//TB0CCTL0 &= ~TBIE;            // TB0 interrupt disabled

TB0EX0 = 0;

TB0CCR0 = 0x00FF;

...


You can check the work of my code if you have a "test board" MSP430FR5969
MSP430FR5969 and MSP430FR5972 are almost identical, except for the memory size.

The Timers works the same there.

  • the problem is that it is not possible to change the PWM filling by setting different TB0CCR0
    works only TB0CCTL0 |= OUTMOD_4 ...
    but at the output there is no response to different values in TB0CCR0.

    I want Timer B to count from 0 to 0hFFFF (TB0CTL = MC__CONTINOUS ) , and PWM is obtained by responding to a value from TB0CCR0.
    In the description of MCP430FR5972(and MSP430FR5969) there is no prohibition on this setting, but ... nothing works ...
    ;-((
  • With CLLD=2, the PWM comparand will only re-load when the counter counts to 0 (every half-second two seconds in this case). Setting it multiple times in this interval has no effect. This is actually a feature. [Ref User Guide SLAU367O section 26.2.3.2]

    To use the CCR0+Continuous trick, you probably want CLLD=0 (to defeat the CLLD mechanism). Alternatively, use Up mode and a different CCR (other than CCR0).

    [Edit: Fixed backwards arithmetic.]

  • Thanks for the reply Bruce!
  • Dear Bruce!
    in my opinion you are mistaken ...
    CLLD --- Compare latch load. These bits select the compare latch load event. 00b = TBxCLn loads on write to TBxCCRn
    ( from SLAU367O )
    "... loads on write to TB0CCR0 ..."
    if I constantly do not write anything in TBxCCRn (I do not write every clock of Timer, but I write only when I need to write), then there will be no change in TBxCLn, because TBxCLn downloads data from TBxCCRn and not vice versa.
    I correctly read the manual SLAU367O? ( Table 26-2. TBxCLn Load Events )
    I checked your advice - it does not work :-(

    I was tired of wasting time checking the "features" of Timer B, so the PWM output from 26 outputs to the 27th was P3.5 (TB0.1) and applied the mode "Timer in Up Mode" with work on TB0CCR1 for PWM.
    now everything works great.

    very good and simple language described examples of settings I found right here:
    coder-tronics.com/.../

    Thank you all for your time spent reading me :)
    Now, I have all the "tools" for configuring the MCP430FR5972 to work under my main task.
    Sorry for being so dumb :)
  • I'm glad you achieved your goal.