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MSP430FR2433: wake-up time vs max power consumption

Expert 6310 points
Part Number: MSP430FR2433
Other Parts Discussed in Thread: MSP430G2513,

Team,

We have an application with very low power sleep mode based on MSP430G2513. Everything is fine and works very well.

Now we would like to squeeze the electronic into a very narrow place with less than 3.5mm width. Unfortunately MSP430G2513 comes in 5x5mm QFN package. Thus we need something in BGA package -The good candidate could be MSP430FR2433.

But I have some questions:

  • Our application must sleep for ca 2uA current waiting for characters sent to UART, all oscillators are switched off.
  • Master communicates at 38400bd and the first edge of the byte on the RXD must switch on the oscillator which clocks the UART to receive the whole packet.
  • We use DCO which is factory trimmed and starts in 1us (MSP430G2513). It means we do not miss any byte. Nice.

But with MSP430FR2433 the DCO is connected with FLL and stabilization can take 280ms. So this is not an option. FLL can be unlocked but still DCO start-up time is 16us, which is quite long for my task. I cannot find DCO temperature drift and supply voltage drift in the datasheet, too.

Is there a way to accomplish my task with the MSP430FR2433 or similar part?

Kind regards,
TI Customer

  • Team,

    can you advise what's the temperature drift of the DCO without FLL in the MSP430FR2433 and how big is the voltage drift?

    Thanks,
    Bartosz

  • Hi Bartosz,

    Thanks for your post. Please see below answers:

    1.The current consumption of MSP430FR2433 is lower than MSP430G2513 for all low power mode. As you can see in the MSP430FR2433 datasheet, if you use LPM3, the 1.2uA standby current can meet your requirement.

    2. eUSCI can use MODCLK as clock source which is designed for fast wake-up( < 1us).

    3. Another sulotion to prevents UART byte missing is using UART hardware flow control mechanism. It needs extra GPIO to wake-up device first then start UART transmission.

    4. The DCO drift is up to its reference clock(Internal REFO or external crystal). The drift of internal REFO clock is as below.

    B.R

    Winter

  • Hi Winter,

    thanks for your feedback. As for DCO drift - it is up to its reference when FLL is on, but we were curious to understand the temperature drift of the DCO alone, when FLL is off. Can you advise?

    Kind regards
  • Hi Bartosz,

    We have no the temperature drift data of the DCO. I think MODCLK is a good option for your design.

    B.R
    Winter

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