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WEBENCH® Tools/MSP430I2020: How to set internal PGA for ADC scaling

Part Number: MSP430I2020
Other Parts Discussed in Thread: MSP430F2013, MSP430FR2355

Tool/software: WEBENCH® Design Tools

Hello All,

I have study the reference datasheet of controller MSP430F4X single chip weigh scale. also sharing a link of datasheet.

I have seen & understand the below things as given in the datasheet.

Load cell capacity = 10kg

Excitation Voltage = 3V

Output = 2mv X 3V

            = 6mV At full load(10kg)

output voltage at 10kg is 6mV & at 1g is 0.6uV

in order to resolve 1g, the LSB voltage of the used ADC should be 4 times smaller that, which is 0.6uV/4=0.15uV.

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In our case we are using MSP430I2020 24bit(ADC) controller.

load cell capacity = 300kg

Here we also share datasheet of load cell for more clarification.0676.PFS-410.pdf

Excitation Voltage = 10V

Output = 2mv X 10V

            = 20mV At full load(300kg)

output voltage at 300kg is 20mV & at 1g is 0.066uV

in order to resolve 1g, the LSB voltage of the used ADC should be 4 times smaller that, which is 0.066uV/4=0.0166uV.

Question:

1) Why we need to divide LSB voltage four times?

2) Which PGA gain setting will be suitable for reading with 300kg load cell?

3) Which is better, internal or external reference voltage?

4) What is the minimum voltage that can be sense by ADC pin of controller?

  • Hello Shashikant,
    1. Why we need to divide LSB voltage four times?
    This is a more or less arbitrary definition of the resolution. There are multiple aspects related to this point. If you just consider the pure ADC result resolution, then of course you could go directly with respective values, reaching the nominal weight resolution of xg or respective LSB number. In reality, due to the ENOB and noise performance, having just one LSB matching the targeted weight resolution, will probably not be sufficient to have really the accuracy of xg. So it is rather the accuracy and not the resolution as such, and of course the value of setting the requirement for the resolution 4x higher is, as stated rather arbitrary.
    2. Which PGA gain setting will be suitable for reading with 300kg load cell?
    The best performance with any ADC can be achieved by mapping the ADC input range most effectively to the signal input range.
    The 300kg cell gives you 20mV at max. load. The datasheet of the i2020 specifies for the ADC with gain 16 an input range of +/-58mV. This is as close you can get with the gain range of the SD ADC of the MSP430i2020. Best resolution would be perfect mapping, means input range +/-10mV to match the 20mV. As you see with the available gain options of the MSP430i2020 this would be only possible with an external OPA in addition.
    3. Which is better, internal or external reference voltage?
    There is no perfect answer to this question. So let me try to answer this in a more generic way. One important aspect of the applied reference voltage value is again the mapping of the ADC range to the signal. So just for simplicity one theoretical example. Let's assume you have a signal ranging from 0 to 1V. Using a reference voltage of 1.5V causes a loss of 1/3 of your ADC resolution, as the range from 1V to 1.5V is wasted. So using a 1V reference would be much better from this perspective.
    Lowering the reference voltage has its limits, as the lower limit of resolution is defined by the noise of the ADC results. This noise has several sources, but one of the significant ones is of course the noise of the reference voltage, as all the inaccuracies and noise of the used reference translate directly into the ADC results.
    So if the external reference has better performance and is better matching the ADC range to the signal range, then it's better.
    4. What is the minimum voltage that can be sense by ADC pin of controller?
    In the given example with the MSP430i2020 and gain of 16, the 1.2V reference is mapped as follows:
    Vfsr = (Vref/2)/Gain = (1.2V/2)/16 = 0.0375V
    This maximum range is Vlsb = (Vref/2)/(2 to power of effective bits)= 17.6µV under the assumption of 15bit ENOBs.
    With 16bit ENOB 8.8µV.

    Now as a summary, the SD in the MSP430F47x devices would be much better suitable due to the available gain of 32.
    Keep in mind there are other MSP430 devices, e.g. like MSP430F2013, also offering the SD with a max. gain of 32.

    The other option is to use an MSP430 FRAM device, with integrated OPAs, DACs and SAR ADC, and working with an adjustable gain, dependent on the input voltage range, using the DACs for DC offset adjustments. e.g. an MSP430FR2355

    Best regards
    Peter
  • Hello Peter,

    Thanks for such a nice explanation.

    Here i'm sharing you schematic part of load cell interfacing with MSP430i2020 controller.

    Question:adc_forum.pdf

    1) Do we need any external circuit between load cell and controller.

    2) Hope as per our requirement our selected load cell (PFS410, @300kg) and controller(MSP430I2020) is suitable to get ADC reading.

    3) Please suggest if we need any additional internal settings for ADC reading.

    4) is it ok to use 16bit ADC instead of 24bit ADC with 32 or 16 gain with any MSP430 series controller?

    5) We have consider Analog ground and digital ground separate, or is it ok to use common ground?

    Thank you

  • Hello Shashikant,
    1) usually the low pass filters should be enough.
    2) This is dependent on your requirements, but as stated before a gain of 32 would be of advantage.
    3) Not sure, what you mean by other internal settings. The ADC of course needs to be initialized according to the operating conditions, you'd like to use. For this you can use on one hand the application report and / or code examples from CCS or our Webpage for the ADC.
    4) The SD ADC within the MSP430 families have very similar base architecture. There are some minor differences, but in terms of the number of bits of the core, they are the same.
    5) If you do not have high disturbance energies in your application, it does not make sense separating analog from digital GND. The significantly more important aspect is the proper layout design for good noise immunity and signal integrity.

    Best regards
    Peter
  • Hello Shashikant,
    do you have further questions on this? I assume for now your questions have been answered sufficiently.

    Best regards
    Peter

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