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MSP430I2030: About the linearity error of SD24

Part Number: MSP430I2030

Dear All,

My Japanese customer has a question about MSP430I2030TRHBR. The question is below:

The linearity error of ADC was evaluated by our company, and the result is that the linearity error at gain x1 becomes larger than at gains x4, x8 and x16. (Please refer to the attached document.) Could you tell us some possible factors about this?

From the data sheet, INL is ± 0.003% FSR, so ΔLSB is considered to be around ± 250, but gain x4, x8, x16 is around ± 50 LSB while x1 is large at -600LSB around 0%.

The test procedure is as follows. I attached the evaluation configuration diagram.

(1) Place the PCB in a thermostat bath and set the ambient temperature to 25 °C.

(2) After the temperature stabilizes, turn on the 3.3V power and leave it for 30 minutes.

(3) Set the gains of AI0, AI1, AI2 and AI3 to 1x.

(4) Input 0% voltage to ADC input full scale (± Vref / gain × 0.8).

(5) Switch the multiplexer to AI0, AI1, AI2, AI3 and measure the input voltage of each channel.

     Output ADC values ​​of 1000 samples of AI0, AI1, AI2 and AI3 by UART communication and record  them with time stamped log.

(6) The input voltage is changed in the range of 0% to 100% and 0% to -100% in 1% steps, and (5) is performed at each input voltage.

(7) The gains of AI0, AI1, AI2 and AI3 are switched 4 times, 8 times and 16 times, and (5) to (6) are repeated with each gain.

(8) After evaluation is complete, turn off the power.

*Only one PCB board can be evaluated.

MSP430 linearity error.pdf

Pls help me

BR

Tom.Liu

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