**Other Parts Discussed in Thread:**MSP430F5529, MSP-TS430PN80USB

Hello readers!

I try to understand how to use the UCS-FLL. Therefore I am using the mentioned TI sample code above on a MSP430F5529.

I am using a MSP-TS430PN80USB with the following quartzes: XT2 = 1MHz (as delivered), XT1 = 32768Hz (XCAP_2, with no external capacitors).

The comments within the code are explaining that

- LFXT1 = 32768Hz --> ACLK

- LFXT1 --> FLL (default) --> MCLK = 32 * ACLK

- HFXT2 --> SMCLK

But my oscilloscope shows me:

- ACLK = 32768Hz, Pin1.0 (21) --> correct according to the comments

- MCLK = 1.0xMHz, Pin7.7 (60) --> could be correct according to the comments if 1.0xMHz = 2^{20}Hz

- SMCLK = about 4MHz, Pin2.2 (31) --> ???

What I don't understand (according to the comments):

- Why can I read on my oscilloscope that there are 4MHz at Pin2.2 if I am using a 1MHz-quartz as XT2?

Assumptions:

- Possibility 1: 2^{16}Hz = XT1 --> FLL --> MCLK = 2^{22}Hz and SMCLK = ??? *) N = 7

- Possibility 2 : MCLK = 1MHz and 2^{16}Hz --> FLL --> SMCLK *) N = 0

*) As I do not know by sure which default FLLN has got I used the formula

f_{DCOCLK} = D * (N + 1) * (F_{FLLREFCK} / n) [from users guide p.93, chapter 4.2.6], where N belongs to FLLN,

to find out what N should be. You can find the answers of my calculations within the assumptions above.

Questions:

- Can anybody confirm that Possibility 2 is right or just put my nose into the right direction?

- I suppose that the default of FLLN = 0 which means N =1. Is this right?

Many thanks in advance!