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Hi zguo, as my understanding, DMA of FR59xx / 58xx / 59xx / 68xx / 60xx is allowed in AM and LPM0 mode. CPU can be off during DMA transfer to reduce the power consumption. Could you please share the document or reason that "the FR59xx / 58xx / 59xx / 68xx / 60xx only allow DMA transfer in active mode". Thanks!
User Guide (SLAU272D) Sec 7.2.7 says that if MCLK is off it will be turned on (using the DCO) long enough to run the DMA cycle(s) then turned off again. The CPU will not execute any instructions.
In the same sense: If main() is waiting in LPM, an ISR runs in Active (CPUOFF=0) mode, but we still refer (loosely) to the program staying in LPM.
Hi zguo and Bruce, Thanks for your discussion and comment! the below items are confirmed: MCLK is used during DMA. CPU will sleep during DMA data transfer. I will close this thread now. and we will update a little bit on the description of MSP DMA document later