Other Parts Discussed in Thread: MSP-FET,
We have been following http://www.ti.com/lit/ug/slau320ag/slau320ag.pdf to program an MSP430 but don't have a fast enough clock to do it in software. We are investigating several approaches and would like guidance on best method.
1) We already have a JTAG/BSCAN block for an FPGA to reuse. It should be simple to adapt this to program the MSP430 but we're not clear enough on what the behavior of TCLK is supposed to be, or how that changes depending on whether we're using SBW or JTAG.
2) A mixed approach where some is handled in SW and other parts are optimized by the FPGA. Probably simple to develop but unsure which exact parts need changed.
These are our main considerations but would be curious to hear how others have gotten around this in the past.
I see a note that support for TCLK input on another pin may or may not exist. Can you elaborate on whether it's possible to control TCLK another way? If that is the case we would rather switch from SBW to JTAG programming and run TCLK independently with the FPGA.