void XT2_Init()
{
unsigned int temp;
P5SEL |= 0x0C; // Port select XT2
UCSCTL6 &=~ XT2OFF; // Enable XT2
UCSCTL6 |= XT2DRIVE_1; // 8~16MHz
do
{
UCSCTL7 &=~ (XT2OFFG); // Clear XT2 fault flag
SFRIFG1 &=~ OFIFG;
for(temp = 0 ;temp <1000;temp++);
}while(UCSCTL7 & XT2OFFG); // Check XT2 fault flag
}
void DCO_Init()
{
unsigned int temp;
UCSCTL3 |= SELREF_2; // FLLref = REFO
do
{
UCSCTL7 &=~ DCOFFG;
SFRIFG1 &=~ OFIFG;
for(temp = 0 ;temp <1000;temp++);
}while (UCSCTL7 & DCOFFG); // Check DCO fault flag
}
void XT1_Init()
{
unsigned int temp;
P7SEL |= 0x03; // Port select XT1
UCSCTL6 &=~ XT1OFF; // Enable XT1
UCSCTL6 &=~ XTS; // Enable LF mode
do
{
UCSCTL7 &= ~(XT1LFOFFG + XT1HFOFFG); // Clear XT1 fault flags
SFRIFG1 &= ~OFIFG;
for(temp = 0 ;temp <1000;temp++);
}while(UCSCTL7 & (XT1LFOFFG + XT1LFOFFG)); // Check XT1 fault flags
}
void Clock_Init()
{
DCO_Init();
XT1_Init();
XT2_Init();
UCSCTL4 |= SELS_5 + SELM_5; // SMCLK=MCLK=XT2
}
void Uart0_Init()
{
uchar ctl0 = 0;
P3SEL |= (UART0_TXD_IO + UART0_RXD_IO);
if(sSysPara.Parity == 'O')
ctl0 |= UCPEN;
else if(sSysPara.Parity == 'E')
ctl0 |= (UCPEN|UCPAR);
if(sSysPara.DataBit == '7')
ctl0 |= UC7BIT;
if(sSysPara.Stop == '2')
ctl0 |= UCSPB; // 2bit停止位,默认为1bit
UCA0CTL1 |= UCSWRST; // **Put state machine in reset**
UCA0CTL1 |= UCSSEL_2; // SMCLK
UCA0CTL0 = ctl0;
switch(sSysPara.UartBaud)
{
case 2400:
UCA0BR0 = UART_BR0_2400; // 16MHz 2400
UCA0BR1 = UART_BR1_2400; // 16MHz 2400
UCA0MCTL = UART_MCTL_2400; // Modulation
break;
case 4800:
UCA0BR0 = UART_BR0_4800; // 16MHz 4800
UCA0BR1 = UART_BR1_4800; // 16MHz 4800
UCA0MCTL = UART_MCTL_4800; // Modulation
break;
case 19200:
UCA0BR0 = UART_BR0_19200; // 16MHz 19200
UCA0BR1 = UART_BR1_19200; // 16MHz 19200
UCA0MCTL = UART_MCTL_19200; // Modulation
break;
case 38400:
UCA0BR0 = UART_BR0_38400; // 16MHz 38400
UCA0BR1 = UART_BR1_38400; // 16MHz 38400
UCA0MCTL = UART_MCTL_38400; // Modulation
break;
case 115200:
UCA0BR0 = UART_BR0_115200; // 16MHz 115200
UCA0BR1 = UART_BR1_115200; // 16MHz 115200
UCA0MCTL = UART_MCTL_115200; // Modulation
break;
default:
UCA0BR0 = UART_BR0_9600; // 16MHz 9600
UCA0BR1 = UART_BR1_9600; // 16MHz 9600
UCA0MCTL = UART_MCTL_9600; // Modulation
break;
}
UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt
}
void WDT_Init()
{
WDTCTL = WDT_VRST_1000;
}
void WDT_Clr()
{
WDTCTL |= WDTPW + WDTCNTCL;
}
void main( void )
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer to prevent time out reset
WDT_IFG = 0;
Clock_Init(); // SMCLK = MCLK = 16MHz
Uart0_Init();
while(1)
{
for(uint i = 0;i < 1025;i++)
{
while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
UCA0TXBUF = 22;
}
}
}
测试代码。求大神指点
