In this case, using STE from Master as a chip select.
Hypothetically, what happens if STE goes active, we receive 1 bit then STE goes inactive. If this happens 8 time (let’s say over hours of time). On the 8th bit will we get a transfer from the RX shift register to the RX buff and then RX interrupt (if enabled)? Or does the fact that STE went inactive reset the shift register?