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MSP430FR2353: Port pins condition

Part Number: MSP430FR2353

Hi Team,

 

There is the following description in TRM (SLAU445I)

After a BOR reset, all port pins are high-impedance with Schmitt triggers and their module functions disabled to prevent any cross currents.

 

Would you please teach me the port pins condition in the following device condition?

1. Power Off

2. Power on before BOR

3. During the reset (BOR to PUC)

4. After the reset (AM, LPM0-3)

5. AM, LPM0-3 to Power off

 

Thanks and Best regards,

 Kuerbis

  • Hi Kuerbis,

    this is all described in the MSP430FR4xxand MSP430FR2xx family User's Guide, as you indicated.

    What do you mean by: 5. AM, LPM0-3 to Power off

    Best regards

    Peter

  • Hi Peter

     

    Thank you for replying.

    I only find two things in in TRM (SLAU445I)

    - After a BOR reset, all port pins are high-impedance with Schmitt triggers and their module functions disabled to prevent any cross currents.

    - After a POR or PUC reset, all port pins are configured as inputs with their module function disabled.

     

    So my understand is for #3 and #4 as below. Is it correct?

    How about #1,2 and 5?

     

    1. Power Off

    2. Power on before BOR

    3. During the reset (BOR to PUC) :

    After a BOR reset, all port pins are high-impedance with Schmitt triggers and their module functions disabled to prevent any cross currents

    After a POR or PUC reset, all port pins are configured as inputs with their module function disabled.

    4. After the reset (AM, LPM0-3) : all port pins are configured as inputs with their module function disabled.

    5. AM, LPM0-3 to Power off

     

    > What do you mean by: 5. AM, LPM0-3 to Power off

    During Power down sequence by the power supply off.

     

    Thanks and Best regards,

    Kuerbis

  • Hi Kuerbis,

    yes, your understanding on 3 and 4 is correct. Though the statement "- After a BOR reset, all port pins are high-impedance with Schmitt triggers and their module functions disabled to prevent any cross currents." is a bit misleading. Cross currents can be also caused by so-called floating nodes, means digital IOs in input mode, if the resulting voltage at the respective GPIOs is not perfectly hi or lo, means at GND or supply level.

    In scenario 5 the GPIOs remain as configured by the user's code until the device hits the BOR threshold, means a reset occurs. The customer can of course implement different solutions, detecting a supply voltage failure, and switch all GPIOs to input at higher supply voltage levels.

    Scenario 2 is basically BOR. The supply voltages far below BOR are not able to switch GPIOs to output, so basically between 0 and BOR threshold you can assume the entire device including GPIOs being in reset.

    Scenario 1, Power off should be clear? Power of means, the device is not supplied. No electronic circuitry can do anything without power supply. What of course needs to be considered, as the device supply level is at 0V, any external signal applied to any device pin will start powering the device, obvious in case of the supply pins, maybe less obvious in case of the GPIOs, where the protecting clamp structures start triggering around 200-300mV. Thus again draining the current down to supply voltage of the device. Thus a logic high signal applied to un-powered device if providing sufficient current might start the device, and of course at the mentioned voltages, there will be current flowing into the device pin.

    Best regards

    Peter

  • Hi Kuerbis,

    is there still something we can do for you on this? If not please close this thread. Many thanks in advance.

    Best regards

    Peter

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