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CCS/MSP430FR5994: Automatic DCO correction - Migration from MSP430F149 to MSP430FR5994

user1082833
Intellectual 330 points
Part Number: MSP430FR5994
Other Parts Discussed in Thread: MSP430F149,

Tool/software: Code Composer Studio

I have an old source code for the MSP430F149. Now I want migrate this code to the MSP430FR5994. In the old code, the DCO was readjusted regularly (each time, when a UART communication was needed, ...). This DCO correction was used to compensate the faults due to temperature changes and so on.

I couldn't find anything comparable for the MSP430FRxxxx serie. Is there an equivalent to this code for the MSP430FR5994?


//------------------------------------------------------Main - MSP430F149------------------------------------------------------//
int main(void)
{  stopWatchdog();

   BCSCTL1 = 0xB7;   // ACLK is devided by 8 = 4096 Hz. RSEL=6 no division for MCLK and SSMCLK. XT2 is off.
   BCSCTL2 = 0x00;   // Init FLL to desired frequency using the 32762Hz crystal DCO frquenzy = 4,001792 MHz
   DCOCTL = 0xFF;
   //Delay for XTAL to settle
   volatile unsigned int i;
   do
     {
     IFG1 &= ~OFIFG;               // Clear OSCFault flag
     for (i = 0xFF; i > 0; i--);   // Time for flag to set
     }
   while ((IFG1 & OFIFG));         // OSCFault flag still set?

   initPorts();
   Set_DCO();
   IE1 |= WDTIE;                   // Enable WDT interrupt
   eint();

   while(1)
      {...
      //Before each UART communication, Set_DCO
      if (...)
         {Set_DCO();}
      ...       
      }
}   


//------------------------------------------------------DCO correction - MSP430F149------------------------------------------------------//
void Set_DCO (void)                         // Set DCO to selected frequency
{
#define DELTA 977                           // target DCO = DELTA*(4096) = 4001792

  unsigned int Compare, Oldcapture = 0;

  BCSCTL1 |= DIVA_3;                        // ACLK= LFXT1CLK/8
  CCTL2 = CM_1 + CCIS_1 + CAP;              // CAP, ACLK
  TACTL = TASSEL_2 + MC_2 + TACLR;          // SMCLK, cont-mode, clear

  while (1)
  {
    while (!(CCIFG & CCTL2));               // Wait until capture occured
    CCTL2 &= ~CCIFG;                        // Capture occured, clear flag
    Compare = CCR2;                         // Get current captured SMCLK
    Compare = Compare - Oldcapture;         // SMCLK difference
    Oldcapture = CCR2;                      // Save current captured SMCLK

    if ((Compare >= DELTA-1)&&(Compare <= DELTA+1)) break;
    else if (DELTA < Compare)               // DCO is too fast, slow it down
    {
      DCOCTL--;
      if (DCOCTL == 0xFF)
      {
        if (!(BCSCTL1 == (XT2OFF + DIVA_3)))
        BCSCTL1--;                          // Did DCO roll under?, Sel lower RSEL
      }
    }
    else
    {
      DCOCTL++;
      if (DCOCTL == 0x00)
        {
          if (!(BCSCTL1 == (XT2OFF + DIVA_3 + 0x0F)))
          BCSCTL1++;                        // Did DCO roll over? Sel higher RSEL
        }
    }
  }
  CCTL2 = 0;                                // Stop CCR2
  TACTL = 0;                                // Stop Timer_A
}

  • 0
    Guru 92251 points

    user1082833 said:
    Is there an equivalent to this code for the MSP430FR5994?

    Not that I can find.

    The Clock System (CS) Module in the MSP430FR5994 is different to the the Basic Clock Module used in the MSP430F149, in that the Clock System Module doesn't have the Modulator for the DCOCLK which the user needs to adjust to control the frequency.

    Instead the Clock System Module DCOCLK in the MSP430FR5994 allows one of 10 Selectable Factory-Trimmed Frequencies to be selected. The MSP430FR5994 datasheet shows the the factory-trimmed frequencies have a tolerance of ±3.5% over the recommended ranges of supply voltage and operating free-air temperature.

    user1082833 said:
    In the old code, the DCO was readjusted regularly (each time, when a UART communication was needed, ...). This DCO correction was used to compensate the faults due to temperature changes and so on.

    What tolerance does your application need on the DCOCLK, and is the tolerance of ±3.5% on the MSP430FR5994 factory-trimmed frequencies sufficient?

  • 0 in reply to Chester Gillon
    Intellectual 330 points

    Thank you very much for your reply.

    In my opinion, and as I read in the Internet, this tolerance of  ±3.5% is to important for a secured UART transmission, because we must add nearly the same tolerance on the other side. In the worst case this would give us an error of nearly  ±7%. I read that this tolerance should be less than  ±2% for a good data transmission, what means  ±1% on each side.

    Is there another way (only with one LFXT, without a second HFXT) to augment the accuracy of the DCO clock that is the source for the SMCLK, used by the UART

    //Clock initialisation
       CSCTL0_H = CSKEY_H;                                           // Unlock CS registers
       CSCTL1 = DCOFSEL_3;                                           // Set DCO to 4MHz
       CSCTL2 = SELA__LFXTCLK | SELS__DCOCLK | SELM__DCOCLK;
       CSCTL3 = DIVA__8 | DIVS__1 | DIVM__1;             // Set all dividers
       CSCTL0_H = CSKEY_H;                                           // Unlock CS registers
       CSCTL4 &= ~LFXTOFF;                                             // Enable LFXT
       do
       {
         CSCTL5 &= ~LFXTOFFG;                                        // Clear LFXT fault flag
         SFRIFG1 &= ~OFIFG;
       } while (SFRIFG1 & OFIFG);                                       // Test oscillator fault flag
       CSCTL0_H = 0;                                                            // Lock CS registers


    //UART initialisation
        UCA1CTLW0 = UCSWRST;                                      //Reset
        UCA1CTLW0 |= UCPEN+UCPAR;
        UCA1CTLW0 |= UCSSEL__SMCLK;                      //SMCLK
        UCA1BR0 = 0xA0;                                                       //Set 115.200bps
        UCA1BR1 = 0x01;             
        UCA1MCTLW = 0xF7;          
        UCA1CTLW0 &= ~UCSWRST;                                  //Reset
        UCA1IE |= UCRXIE;

  • 0 in reply to user1082833
    TI__Mastermind 27635 points

    Hi,

    In this case, I would suggest to use an HFXT to sourcing the UART.

    Best regards,

    Cash Hao

  • 0 in reply to Cash Hao11
    Intellectual 330 points

    Thank you for your reply.

    Isn't there another solution? Because it couldn't be, that each device, that uses a UART with the MSP430FR5994, must have a separate HFXT. This isn't realisable, even in power consideration (the power consumption is far more hight for a HFXT, than for a LFXT). Furthermore, all the "old" MSP430Fxxx series has a DCO compensation to resolve this problem.Why isn't it possible on the "newer" versions of the MSP430FRxxx series?

    Have someone any experience with the UART and a LFXT?

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