MSP430BT5190: Bootloader BSL Entry Sequence & Timing

cindy zhao1

Part Number: MSP430BT5190

Hello,

We have an old product which used MSP430BT5190 and Silicon Labs USB to UART chip CP2102. We used TI's BSLDEMO to upgrade firmware and it always worked fine. We recently re-spin the board. We have issues with Silicon Labs CP2102 chip on Windows 10. BSLDEMO could not control RTS/DTR pins anymore. We replaced CP2102 with other company's USB to UART chip. Now the BSLDEMO could control RTS/DTR pins, but MSP430BT5190 still does not go to the bootloader mode. We checked the documents: MSP430™ Flash Devices Bootloader (BSL) and MSP430BT5190 Device Erratasheet and it seems we are not able to find the requirements of the MSP430BT5190 BSL entry sequence & exact timing. Could you please help?

Thanks in advance,

Cindy

over 3 years ago

0 Xiaodong LI over 3 years ago

TI__Mastermind 20025 points

Hi Cindy,

Please check SYS10 and JTAG 20 on MSP430BT5190 Device Erratasheet (Rev. AE). Thanks!

0 cindy zhao1 over 3 years ago in reply to Xiaodong LI

Prodigy 80 points

Hi Xiaodong,

Thank you for your quick reply!

SYS10 specifies the pulse width 15us, also suggested "This timing requirement is faster than most PC serial ports". It is almost impossible to implement this on PC program. We used BSLDEMO on our previous hardware and it worked. In BSLDEMO code, the pulses width were much longer than 15 us. We are not sure if we just were lucky to have BSLDEMO worked on our previous hardware. Currently we stuck at BSL entry and could not make MPU to go to the BSL mode on our new hardware. It would be very helpful if you could provide the exact BSL entry timing so that we could make BSLDEMO work on our new hardware.

JTAG 20 is for exit BSL program, not for BSL entry. We used JTAG 20 to exit BSL and it worked well

Thanks,

Cindy

0 Xiaodong LI over 3 years ago in reply to cindy zhao1

TI__Mastermind 20025 points

Hi Cindy

on MSP430BT5190 Device Erratasheet (Rev. AE), The BSL entry sequence requires that the low phase of the TEST/SBWTCK pin does not exceed 15us is on SYS10. and on 1, Functional Errata Revision History, SYS10 bug affected revision D,E,G. but it doesn't affect revision F, G. may I know the revision of device you used.

on Bootstrap Loader User's Guide (SLAU319), 1.3.1.1 MSP430 Devices With Shared JTAG Pins, The first high level of the TEST pin must be at least
tSBW, En (see device-specific data sheet for tSBW, En parameter).

on MSP430BT5190 Mixed-Signal Microcontroller datasheet (Rev. B), tSBW, En is 1uS max. May I know if this time is OK on your board?

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MSP430BT5190: Bootloader BSL Entry Sequence & Timing