Tool/software: Code Composer Studio
I had some issues with increased power consumption which only happened when the USB was initialized, via the function USB_setup(TRUE, TRUE).
I traced the issue to the function USB_determineXT2Freq. This function uses TA1 to determine the crystal frequency. Unfortunately after the function is done, it will leaves the TA1 in running state.
To fix this issue I added the line TIMER_CTL =0, see below the whole function with the fix:
int16_t USB_determineXT2Freq(void){
uint16_t i, xt2Freq,timerCCR;
#if defined (__MSP430F552x) || defined (__MSP430F550x)
// GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P5, GPIO_PIN2);
// GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P5, GPIO_PIN3);
#elif defined (__MSP430F563x_F663x) || defined (__MSP430F565x_F665x) || defined (__MSP430FG6x2x)
// GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P7, GPIO_PIN2);
// GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_P7, GPIO_PIN3);
#endif
//Switch on XT2 oscillator
HWREG16(UCS_BASE + OFS_UCSCTL6) &= ~XT2OFF;
// Wait until OFIFG flag is cleared
while (UCSCTL7 & (DCOFFG + XT2OFFG))
{
UCSCTL7 &= ~(DCOFFG + XT1LFOFFG + XT2OFFG); // Clear OSC flaut Flags fault flags
SFRIFG1 &= ~OFIFG; // Clear OFIFG fault flag
}
// Set SMCLK = XT2
UCS_initClockSignal(
UCS_SMCLK,
UCS_XT2CLK_SELECT,
UCS_CLOCK_DIVIDER_1);
TIMER_CTL = TIMER_CTL_SETTINGS; // TA clock = SMCLK (DCO), cont. mode
for( i = 300; i > 0; i --) // this loop causes the "crystal detect"
{ // to function as a crystal stabilization delay
TIMER_CTL |= TIMER_CTL_CLR;
TIMER_CCTL = TIMER_CCTL_SETTINGS; // Rising edge, CCI2A = ACLK, Capture
while(!(TIMER_CCTL & TIMER_CCTL_IFG) ){} // wait for first capture (unknown time)
}
TIMER_CCTL &= ~CM_1;
timerCCR = TIMER_CCR; // Using local variable to compare register
TIMER_CTL =0; //BUGFGIX SWITCH TA1 OFF AGAIN
// Set SMCLK = DCO
UCS_initClockSignal(
UCS_SMCLK,
UCS_DCOCLK_SELECT,
UCS_CLOCK_DIVIDER_1);
// Check if the XT2Freq is greater 24MHz
if( timerCCR > (((AUTO_DETECT_XT2_SPEED_1 + AUTO_DETECT_XT2_SPEED_2) / 2)/ REFO_CLK_FREQ) )
{
// 24MHz
xt2Freq = (AUTO_DETECT_XT2_SPEED_1/1000000);
}
// Check if the XT2Freq is between 16MHz and 24Mhz
else if( timerCCR > (((AUTO_DETECT_XT2_SPEED_2 + AUTO_DETECT_XT2_SPEED_3) / 2)/ REFO_CLK_FREQ) )
{
// 16MHz
xt2Freq = (AUTO_DETECT_XT2_SPEED_2/1000000);
}
// Check if the XT2Freq is between 12MHz and 16Mhz
else if( timerCCR > (((AUTO_DETECT_XT2_SPEED_3 + AUTO_DETECT_XT2_SPEED_4) / 2)/ REFO_CLK_FREQ) )
{
// 12MHz
xt2Freq = (AUTO_DETECT_XT2_SPEED_3/1000000);
}
// Check if the XT2Freq is between 8MHz and 12Mhz
else if( timerCCR > (((AUTO_DETECT_XT2_SPEED_4 + AUTO_DETECT_XT2_SPEED_5) / 2)/ REFO_CLK_FREQ) )
{
// 8MHz
xt2Freq = (AUTO_DETECT_XT2_SPEED_4/1000000);
}
else
{
// 4MHz
xt2Freq = (AUTO_DETECT_XT2_SPEED_5/1000000);
}
return xt2Freq;
}
Furthermore to this, which is really weird, is that TA1CTL is not reset by a forced reset via
PMMCTL0 |=PMMSWBOR; //force reset
or
PMMCTL0 |=PMMSWPOR; //force reset
Which will lead to increased power consumption until the CPU is rest via the external reset or power cycle.
