Tool/software: Code Composer Studio
Please help to check the following information. Thanks!
After the chip turns on the ADC for continuous sampling, is the switch of the AD channel input always closed?
If it is not always closed, will the switch be turned on every time the ADC conversion result is generated, that is, when the next sampling starts, and only once?
Now the sampling frequency of ADC has been adjusted to the highest, because the waveform change cycle is relatively fast. The purpose is to try to make the sampled waveform not distorted. It is now found that under certain working conditions, the phase of the sampled signal is shifted forward. So confirm the time point when the AD module actually collected the external voltage signal in order to troubleshoot the cause.
The current sampled voltage changes no more than 30mV.So I think this lag problem should not be caused by the step response of the ADC. All I can think of is the effect of that switch on the front end.