Looking for clarification, to make sure this feature will work in my design.... If the I2C is a slave and I enable the RX interrupt, and at the same time I have the RX DMA enabled, it's my understanding that the RX interrupt will happen but the DMA transfer will not happen until the RX interrupt bit is disable and the interrupt flag bit is set. Is this correct?
What I'm hoping that I can do, is to setup the DMA memory location after receiving the first byte from the master processor (vectoring to the interrupt will clear the interrupt flag bit). After decoding the first byte I can set the memory location for the DMA transfer and then clear the interrupt flag enabling the DMA to receive the remainder of bytes feeding in from the master cpu. Is this a correct understanding? I was thinking the interrupt bit would be disabled after the DMA memory assignment is made.
Thanks!!