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system clock question about msp430f4260

Other Parts Discussed in Thread: MSP430F4260

I'm a newbie.When I was writting a program for msp430f4260 to start the LFXT1(8MHZ) in a High frequency mode.

I came to see something in the msp430f4xx family user's guide that really confused me. It says :

SELMx      Bits4−3   (in FLL_CTL1, FLL+ Control Register 1)

                  Select MCLK. These bits select the MCLK source. Not present in MSP430x41x, MSP430x42x devices.

                            00 DCOCLK

                            01 DCOCLK

                            10 XT2CLK

                            11 LFXT1CLK

"Not present "?   Is that means we can only use DCOCLK as the MCLK?

In addition,can you help to see is there any problem with the  main C program below?(The belowing program dose not make the MCU work at 8MHZ)

 

WDTCTL = WDTPW + WDTHOLD;  //stop the watchdog

FLL_CTL1 |=BIT6+BIT4+BIT3;   //CLOSE SMCLK,Choose LFXT1CLK for MCLK

 FLL_CTL0 |=BIT6;  //set LFXT1 to High frequency mode, 

  P1SEL |=BIT1;

  P1DIR |=BIT1;      //MCLK =P1.1,convienient for test

 

 

 

 

 

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