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MSP430F5525 USB Data Rate

At the maximum clock rate how can I estimate my effective data rate over the USB interface?  What other factors in the processor can limit the USB data rate?

  • Well, I have no authoritative answer. However...

    The USB controller runs with 48MHz clock. so maximum bus speed would be 12Mbit/s full-speed (next step would be 480MBit/s high-speed) or 1.5Mb/s brutto.

    The MSPs with USB have 20MHz system clock. That means the USB ram can be read with 20MWord/s by the USB controller. This is no limiting factor then. Even with waitstates.

    How much you can really send/receive (throughput) depends on your software. With 1.5MB/s coming in, you'll have to handle each byte within 13 MCLK cycles average. Or provide that much, including assembling the USB packages and doing all the administrative stuff.

  • Kerry Cougle said:

    At the maximum clock rate how can I estimate my effective data rate over the USB interface?  What other factors in the processor can limit the USB data rate?

    It depends on a number of factors.

    If you are using interrupt transfers, meaning the USB host polls the device within a defined interval for transfers, you get an upper bound for the maximum latency between transfers, 1ms for full-speed. However, the host is not required to poll any more frequently, and in fact on many Intel chipsets the UHCI USB controller will only allow a single transfer once every ms if your packet size is less than 64-bytes. This makes the worst case throughput of 64KB/s. Note that depending on the host controller the transfers may begin earlier than the set interval, so this only sets the lower bound or guaranteed bandwidth. You may or may not get more than 64KB/s depending on the host controller.

    If you're using bulk transfers, the USB host controller would attempt to utilize all the available bandwidth possible on the bus. This translates to up to 19 packets of 64 bytes per 1ms frame on full-speed, which is 1216 bytes per frame for a 1.216MB/s theoretical maximum speed. However, if the bus is busy, the host controller will delay the bulk transfer until bandwidth frees up; there's no guarantee of when the packet will arrive, just that it eventually would. Also note that the aforementioned limitation of Intel UHCI controllers apply here as well, so if you were to set the bulk packet size to less than 64 bytes, the controller will schedule no more than one transfer every ms.

    By this point you probably noticed that I've mostly talked about the host; that's because in USB every transfer has to be initiated from the host, regardless of whether it's an IN or OUT endpoint. This makes optimizing the performance on the MSP430 relatively simple, you just have to make sure you are filling/retrieving the USB buffer as quickly as possible. The MSP430 USB developers package supports double buffering, but I have not personally tried the particular feature.

    Hope this helps.

    Tony

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